Multiple Linear Power Controller with
ACPI Control Interface
The ISL6505 complements other power building blocks
(voltage regulators) in ACPI-compliant designs for
microprocessor and computer applications. The IC
integrates three linear controllers/regulators, switching,
monitoring and control functions into a 20-pin wide-body
SOIC or 20-pin QFN (also known as MLF) 5x5 package.
The ISL6505’s operating mode (active or sleep outputs) is
selectable through two digital control pins, S3 and S5.
One linear controller generates the 3.3VDUAL/3.3VSB
voltage plane from the ATX supply’s 5VSB output, powering
the south bridge and the PCI slots through an external NPN
pass transistor during sleep states (S3, S4/S5). In active
state (during S0 and S1/S2), the 3.3VDUAL/3.3VSB linear
regulator uses an external N-channel pass MOSFET to
connect the outputs directly to the 3.3V input supplied by an
ATX power supply, for minimal losses. The
3.3VDUAL/3.3VSB output is active for as long as the ATX 5VSB
voltage is applied to the chip.
A controller powers up the 5VDUAL plane by switching in the
ATX 5V output through an NMOS transistor in active states,
or by switching in the ATX 5VSB through a PMOS (or PNP)
transistor in S3 sleep state. In S4/S5 sleep states, the
ISL6505 5VDUAL output is either shut down or stays on,
based on the state of the EN5 pin.
An internal linear regulator supplies the 1.2V for the voltage
identification circuitry (VID) only during active states (S0 and
S1/S2), and uses the 3V3 pin as input source for its internal
A linear controller generates VOUT1 from the
3.3VDUAL/3.3VSB voltage plane, using an external NFET.
The voltage is user-programmable to values between 1.2V
and 1.5V, using an external resistor divider. The mode is
user-selectable with the LAN pin; a logic high (or open)
selects the 10/100 LAN mode, where VOUT1 is always on
(S0-S5); a logic low selects the Gigabit Ethernet mode,
where VOUT1 is only on during active modes (S0-S2).
• Provides four ACPI-Controlled Voltages
- 5VDUAL USB/Keyboard/Mouse
- 3.3VDUAL/3.3VSB PCI/Auxiliary/LAN
- 1.2VVID Processor VID Circuitry
- VOUT1 (1.2V - 1.5V programmable) LAN/Ethernet
• Excellent Output Voltage Regulation
- All Outputs: ±2.0% over temperature (as applicable)
• Small Size; Very Low External Component Count
• Undervoltage Monitoring of All Outputs with Centralized
FAULT Reporting and Temperature Shutdown
• QFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• ACPI-Compliant Power Regulation for Motherboards
ISL6505 (20-LEAD-WIDE SOIC) TOP VIEW
ISL6505 (5 X 5 QFN) TOP VIEW
20 19 18 17 16
PART NUMBER RANGE (oC)
0 to 70 20 Ld Wide SOIC M20.3
0 to 70 20 Ld 5x5 QFN L20.5x5
Evaluation Board (SOIC)
ISL6505AEVAL2 Evaluation Board (QFN)
6 7 8 9 10
NOTE: The QFN bottom pad is electrically connected to the IC substrate, at GND potential.
It can be left unconnected, or connected to GND; do NOT connect to another potential.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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