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®
Data Sheet
July 2003
ISL6522A
FN9122.1
Buck and Synchronous Rectifier
Pulse-Width Modulator (PWM) Controller
The ISL6522A provides complete control and protection for a
DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous rectified buck
topology. The ISL6522A integrates all of the control, output
adjustment, monitoring and protection functions into a single
package.
The output voltage of the converter can be precisely
regulated to as low as 0.8V, with a maximum tolerance of
±0.5% over temperature and line voltage variations.
The ISL6522A provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0–100%.
The ISL6522A protects against overcurrent conditions by
inhibiting PWM operation. The ISL6522A monitors the
current by using the rDS(ON) of the upper MOSFET which
eliminates the need for a current sensing resistor.
Pinout
ISL6522ACR (16 LEAD QFN)
TOP VIEW
16 15 14 13
SS 1
COMP 2
FB 3
12 PVCC
11 LGATE
10 PGND
EN 4
9 BOOT
5678
Features
• Drives two N-Channel MOSFETs
• Operates from +5V or +12V input
• Simple single-loop control design
- Voltage-mode PWM control
• Fast transient response
- High-bandwidth error amplifier
- Full 0–100% duty ratio
• Excellent output voltage regulation
- 0.8V internal reference
- ±0.5% over line voltage and temperature
• Overcurrent fault monitor
- Does not require extra current sensing element
- Uses MOSFETs rDS(ON)
• Converter can source and sink current
• Small converter size
- Constant frequency operation
- 200kHz free-running oscillator programmable from
50kHz to over 1MHz
• 16 Lead 5x5mm QFN Package
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline.
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
Applications
• Power supply for Pentium®, Pentium Pro, PowerPC® and
AlphaPC™ microprocessors
• High-power 5V to 3.xV DC-DC regulators
• Low-voltage distributed power supplies
Ordering Information
PART NUMBER
ISL6522ACR
TEMP.
RANGE (oC)
PACKAGE
25 to 70 16 Ld 5x5 QFN
PKG.
DWG. #
L16.5x5B
1 CCAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

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ISL6522A
Typical Application
SS
12V
VCC
MONITOR AND
PROTECTION
RT
OSC
REF
ISL6522A
-
FB + +
-
COMP
+5V OR +12V
OCSET
EN
BOOT
UGATE
PHASE
PVCC +12V
LGATE
PGND
GND
+VO
Block Diagram
VCC
OCSET
FB
COMP
RT
200µA
0.8VREF
REFERENCE
POWER-ON
RESET (POR)
+
- OVER
CURRENT
4V
SOFT-
START
10µA
+
-
ERROR
AMP
PWM
COMPARATOR
+
-
INHIBIT
PWM
GATE
CONTROL
LOGIC
OSCILLATOR
EN
SS
BOOT
UGATE
PHASE
PVCC
LGATE
PGND
GND
2

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ISL6522A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15.0V
Boot Voltage, VBOOT - VPHASE. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range, ISL6522AC. . . . . . . . . . 25oC to 70oC
Junction Temperature Range, ISL6522AC. . . . . . . . . . 0oC to 125oC
Thermal Information
Thermal Resistance
θJA(oC/W) θJC(oC/W)
QFN Package (Notes 1, 2) . . . . . . . . . .
36
5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. SeeTech
Brief TB379.
2. For θJC, the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER
SYMBOL
TEST CONDITIONS
VCC SUPPLY CURRENT
Nominal Supply
Shutdown Supply
ICC EN = VCC; UGATE and LGATE Open
EN = 0V
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Enable-Input Threshold Voltage
Rising VOCSET Threshold
OSCILLATOR
VOCSET = 4.5VDC
VOCSET = 4.5VDC
VOCSET = 4.5VDC
Free Running Frequency
Total Variation
Ramp Amplitude
REFERENCE
VOSC
RT = OPEN, VCC = 12
6k< RT to GND < 200k
RT = OPEN
Reference Voltage Tolerance
Reference Voltage
VREF
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
GBW
Slew Rate
SR COMP = 10pF
GATE DRIVERS
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
PROTECTION
IUGATE
RUGATE
ILGATE
RLGATE
VBOOT - VPHASE = 12V, VUGATE = 6V
ILGATE = 0.3A
VCC = 12V, VLGATE = 6V
ILGATE = 0.3A
OCSET Current Source
Soft-Start Current
IOCSET
ISS
VOCSET = 4.5VDC
MIN TYP MAX UNITS
- 5 - mA
-
50 100
µA
- - 10.4
8.8 -
-
0.8 - 2.0
- 1.27 -
V
V
V
V
175 200 230
-20 - +20
- 1.9 -
-0.5 - 0.5
- 0.800 -
kHz
%
VP-P
%
V
- 88 -
dB
- 15 - MHz
- 6 - V/µs
350 500
-
- 5.5 10
300 450
-
- 3.5 6.5
mA
mA
170 200 230
- 10 -
µA
µA
3

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ISL6522A
Typical Performance Curves
1000
100
10
RT PULLUP
TO +12V
RT PULLDOWN
TO VSS
10 100
SWITCHING FREQUENCY (kHz)
FIGURE 1. RT RESISTANCE vs FREQUENCY
1000
Functional Pin Descriptions
RT
This pin provides oscillator switching frequency adjustment.
By placing a resistor (RT) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs 200kHz + -5---------1---0----6-
RT
(RT to GND)
Conversely, connecting a pull-up resistor (RT) from this pin to
VCC reduces the switching frequency according to the
following equation:
Fs 200kHz 4----------1---0----7-
RT
(RT to 12V)
OCSET
Connect a resistor (ROCSET) from this pin to the drain of the
upper MOSFET. ROCSET, an internal 200µA current source
(IOCS), and the upper MOSFET on-resistance (rDS(ON)) set
the converter overcurrent (OC) trip point according to the
following equation:
IPEAK
=
I--O-----C----S---------R-----O----C-----S----E---T--
rDS(ON)
An overcurrent trip cycles the soft-start function.
SS
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the
soft-start interval of the converter.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
80
70
60
CGATE = 3300pF
50
40
30 CGATE = 1000pF
20
10 CGATE = 10pF
0
100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
EN
This pin is the open-collector enable pin. Pull this pin below
1V to disable the converter. In shutdown, the soft-start pin is
discharged and the UGATE and LGATE pins are held low.
GND
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PHASE
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for overcurrent protection. This pin also provides the return
path for the upper gate drive.
UGATE
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET. This pin is also
monitored by the adaptive shoot through protection circuitry to
determine when the upper MOSFET has turned off.
BOOT
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE
Connect LGATE to the lower MOSFET gate. This pin provides
the gate drive for the lower MOSFET. This pin is also
4

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ISL6522A
monitored by the adaptive shoot through protection circuitry to
determine when the lower MOSFET has turned off.
PVCC
Provide a bias supply for the lower gate drive to this pin.
VCC
Provide a 12V bias supply for the chip to this pin.
Functional Description
Initialization
The ISL6522A automatically initializes upon receipt of
power. Special sequencing of the input supplies is not
necessary. The Power-On Reset (POR) function continually
monitors the input supply voltages and the enable (EN) pin.
The POR monitors the bias voltage at the VCC pin and the
input voltage (VIN) on the OCSET pin. The level on OCSET
is equal to VIN less a fixed voltage drop (see overcurrent
protection). With the EN pin held to VCC, the POR function
initiates soft-start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, VIN and VCC are equivalent and the
+12V power source must exceed the rising VCC threshold
before POR initiates operation.
The POR function inhibits operation with the chip disabled
(EN pin low). With both input supplies above their POR
thresholds, transitioning the EN pin high initiates a soft-start
interval.
Soft-Start
The POR function initiates the soft-start sequence. An internal
10µA current source charges an external capacitor (CSS) on
the SS pin to 4V. Soft-start clamps the error amplifier output
(COMP pin) to the SS pin voltage. Figure 3 shows the
soft-start interval. At t1 in Figure 3, the SS and COMP
voltages reach the valley of the oscillator’s triangle wave. The
oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitor(s). This
interval of increasing pulse width continues to t2, at which
point the output is in regulation and the clamp on the COMP
pin is released. This method provides a rapid and controlled
output voltage rise.
5
VOLTAGE
VSOFT START
VOUT
VOSC(MIN)
VCOMP
CLAMP ON VCOMP
RELEASED AT STEADY STATE
t0 t1 t2
TIME
t1
=
C-----S----S--
ISS
VO
S
C
(
M
IN)
tSoftStart
=
t2 t1
=
-C----S----S--
ISS
-V----O----U----T----S----t--e---a---d----y---S----t-a----t--e-
VIN
VOS
C
Where:
CSS = Soft Start Capacitor
ISS = Soft Start Current = 10µA
VOSC(MIN) = Bottom of Oscillator = 1.35V
VIN = Input Voltage
VOSC = Peak to Peak Oscillator Voltage = 1.9V
VOUTSteadyState = Steady State Output Voltage
FIGURE 3. SOFT-START INTERVAL
4V
2V
0V
15A
10A
5A
0A
TIME (20ms/DIV)
FIGURE 4. OVERCURRENT OPERATION
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
rDS(ON) to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (ROCSET)
programs the overcurrent trip level. An internal 200µA
(typical) current sink develops a voltage across ROCSET that