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TM
Data Sheet
February 2002
ISL6523A
FN9063
VRM8.5 Dual PWM and Dual Linear Power
System Controller
The ISL6523A provides the power control and protection for
four output voltages in high-performance microprocessor
and computer applications. The IC integrates two PWM
controllers and two linear controllers, as well as the
monitoring and protection functions into a 28-pin SOIC
package. One PWM controller regulates the microprocessor
core voltage with a synchronous-rectified buck converter.
The second PWM controller supplies the computer system’s
AGTL+ 1.2V bus power with a standard buck converter. The
linear controllers regulate power for the 1.5V AGP bus and
the 1.8V power for the chipset core voltage and/or cache
memory circuits.
The ISL6523A includes an Intel VRM8.5 compatible, TTL
5-input digital-to-analog converter (DAC) that adjusts the
microprocessor core-targeted PWM output voltage from
1.050V to 1.825V in 25mV steps. The precision reference
and voltage-mode control provide ±1% static regulation. The
second PWM controller’s output provides a voltage level of
1.2V with ±3% accuracy. The linear regulators use external
N-channel MOSFETs or bipolar NPN pass transistors to
provide fixed output voltages of 1.5V ±3% (VOUT3) and 1.8V
±3% (VOUT4).
The ISL6523A monitors all the output voltages. A delayed-
rising VTT (standard buck output) Power Good signal is
issued before the core PWM starts to ramp up. Another
system Power Good signal is issued when the core is within
±10% of the DAC setting and all other outputs are above
their under- voltage levels. Additional built-in overvoltage
protection for the core output uses the lower MOSFET to
prevent output voltages above 115% of the DAC setting. The
PWM controllers’ overcurrent function monitors the output
current by using the voltage drop across the upper
MOSFET’s rDS(ON), eliminating the need for a current
sensing resistor.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
ISL6523ACB
0 to 70 28 Ld SOIC
ISL6523EVAL1
Evaluation Board
PKG.
NO.
M28.3
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, AGTL+ Bus, AGP Bus Power,
and North/South Bridge Core
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
and Bipolar Series Pass Transistors
• Simple Single-Loop Control Designs
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifiers
- Full 0% to 100% Duty Ratios
• Excellent Output Voltage Regulation
- Core PWM Output . . . . . . . . . . ±1% Over Temperature
- All Other Outputs . . . . . . . . . . . . . ±3% Over Temperature
• VRM8.5 TTL-Compatible 5-Bit DAC Microprocessor Core
Output Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . . 1.050V to 1.825V
• Power-Good Output Voltage Monitors
- Separate delayed VTT Power Good
• Overcurrent Fault Monitors
- Switching Regulators Do Not Require Extra Current
Sensing Elements, Use MOSFET’s rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Internal Oscillator
Applications
Motherboard Power Regulation for Computers
Pinout
ISL6523A (SOIC)
TOP VIEW
UGATE2 1
PHASE2 2
VID3 3
VID2 4
VID1 5
VID0 6
VID25 7
PGOOD 8
VTTPG 9
OCSET2 10
VSEN2 11
SS24 12
SS13 13
VSEN4 14
28 VCC
27 UGATE1
26 PHASE1
25 LGATE1
24 PGND
23 OCSET1
22 VSEN1
21 FB1
20 COMP1
19 VSEN3
18 DRIVE3
17 GND
16 VAUX
15 DRIVE4
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved

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VSEN3
OCSET2
VSEN1
OCSET1
VCC
DRIVE3
DRIVE4
VSEN4
UGATE2
PHASE2
VSEN2
VAUX
EA3
-
+
1.5V
x0.75
- UV3
+
+
-
EA4
VCC
DRIVE2
x0.75
+
1.8V
-
+ UV4
-
+ OC2
-
200µA
GATE
CONTROL
INHIBIT
PWM
COMP2
PWM2
-
+ EA2
FAULT
SOFT-
START
& FAULT
LOGIC
OV
VCC
x0.90
+
1.2V
-
UV2
SET
Q
CLK
QD
CLR
OSCILLATOR
28µA
4.5V
x 1.10
x 0.90
x 1.15
28µA
4.5V
+ 200µA
-
+
-
POWER-ON
RESET (POR)
+
-
OC1 +
-
VCC
DRIVE1
+
-
EA1
DACOUT
+
-
PWM
COMP1
GATE
CONTROL
PWM1
SYNCH
DRIVE
TTL D/A
CONVERTER
(DAC)
VCC
VAUX
PGOOD
UGATE1
PHASE1
LGATE1
PGND
GND
VTTPG
SS13
SS24
FB1 COMP1 VID3 VID2 VID1 VID0 VID25
FIGURE 1. BLOCK DIAGRAM

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+5VIN
VOUT2
Q3
+3.3VIN
VOUT3
Q4
ISL6523A
PWM2
CONTROLLER
PWM1
CONTROLLER
ISL6523A
LINEAR
CONTROLLER
LINEAR
CONTROLLER
Q1
VOUT1
Q2
Q5
VOUT4
FIGURE 2. SIMPLIFIED POWER SYSTEM DIAGRAM
+12VIN
+5VIN
VOUT2
1.2V
LIN
CIN
LOUT2
Q3
COUT2
CR2
OCSET2
UGATE2
PHASE2
VSEN2
VTT POWERGOOD
+3.3VIN
VOUT3
1.5V
COUT3
VOUT4
1.8V
COUT4
VTTPG
VAUX
Q4 DRIVE3
VSEN3
DRIVE4
Q5
VSEN4
SS24
CSS24
VCC
OCSET1
PGOOD
UGATE1
PHASE1
ISL6523A
LGATE1
PGND
VSEN1
FB1
COMP1
POWERGOOD
Q1
LOUT1
VOUT1
1.3V to 3.5V
Q2 COUT1
GND
VID3
VID2
VID1
VID0
VID25
SS13
CSS13
FIGURE 3. TYPICAL APPLICATION
3

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ISL6523A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V
PGOOD, RT/FAULT, DRIVE, PHASE, and
GATE Voltage. . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC + 0.3V
Input, Output or I/O Voltage . . . . . . . . . . . . . . . . . . GND -0.3V to 7V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3
PARAMETER
SYMBOL
TEST CONDITIONS
VCC SUPPLY CURRENT
Nominal Supply Current
ICC UGATE1, LGATE1, UGATE2, DRIVE3, and
DRIVE4 Open
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Rising VAUX Threshold
VAUX Threshold Hysteresis
Rising VOCSET1 Threshold
OSCILLATOR
Free Running Frequency
FOSC
Ramp Amplitude
VOSC
DAC AND STANDARD BUCK REGULATOR REFERENCE
DAC (VID25-VID3) Input Low Voltage
DAC (VID25-VID3) Input High Voltage
DACOUT Voltage Accuracy
PWM2 Regulation Voltage
PWM2 Regulation Voltage Tolerance
1.5V AND 1.8V LINEAR REGULATORS (VOUT3 AND VOUT4)
Regulation Tolerance
VSEN3 Regulation Voltage
VSEN4 Regulation Voltage
VSEN3,4 Under-Voltage Level
VSEN3 Under-Voltage Hysteresis
VREG3
VREG4
VSEN3,4UV
VSEN3,4 Rising
VSEN3 Falling
Output Drive Current
VAUX-VDRIVE3,4 > 0.6V
SYNCHRONOUS PWM CONTROLLER ERROR AMPLIFIER
DC Gain
Note 2
Gain-Bandwidth Product
GBWP Note 2
Slew Rate
SR COMP1 = 10pF, Note 2
PWM CONTROLLERS GATE DRIVERS
UGATE1,2 Source
UGATE1,2 Sink
IUGATE
RUGATE
VCC = 12V, VUGATE1 (or VUGATE2) = 6V
VGATE-PHASE = 1V
MIN TYP MAX
-9-
- - 10.4
8.2 -
-
- 2.5 -
- 0.5 -
- 1.26 -
185 200 215
- 1.9 -
- - 0.8
2.0 -
-
-1.0 - +1.0
- 1.2 -
-3-
-3
- 1.5
- 1.8
- 75
-7
20 40
-
-
-
-
-
-
- 88 -
- 15 -
-6-
-1-
- 1.7 3.5
UNITS
mA
V
V
V
V
V
kHz
VP-P
V
V
%
V
%
%
V
V
%
%
mA
dB
MHz
V/µs
A
4

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ISL6523A
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued)
PARAMETER
LGATE Source
LGATE Sink
PROTECTION
VSEN1 Over-Voltage (VSEN1/DACOUT)
OCSET1,2 Current Source
Soft-Start Current
POWER GOOD
VSEN1 Upper Threshold
(VSEN1/DACOUT)
VSEN1 Under-Voltage
(VSEN1/DACOUT)
VSEN1 Hysteresis (VSEN1/DACOUT)
PGOOD Voltage Low
VSEN2 Under-Voltage
VSEN2 Hysteresis
VTTPG Voltage Low
NOTE:
2. Guaranteed by design
SYMBOL
ILGATE
RLGATE
TEST CONDITIONS
VCC = 12V, VLGATE1 = 1V
VLGATE = 1V
IOCSET
ISS13,24
VSEN1 Rising
VOCSET = 4.5VDC
VSS13,24 = 2.0VDC
VSEN1 Rising
VSEN1 Rising
VPGOOD
VVTTPG
VSEN1 Falling
IPGOOD = -4mA
VSEN2 Rising
VSEN2 Falling
IVTTPG = -4mA
MIN TYP MAX UNITS
-1-
A
- 1.4 3.0
- 120 -
170 200 230
- 28 -
%
µA
µA
108 - 110
92 - 94
-2-
- - 0.8
- 1.00 -
- 60 -
- - 0.8
%
%
%
V
V
mV
V
Typical Performance Curve
140
CUGATE1 = CUGATE2 = CLGATE1 = C
120 VIN = 5V
VCC = 12V
100
C = 4800pF
80
C = 3600pF
60
C = 1500pF
40
20 C = 660pF
0
100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
FIGURE 4. BIAS SUPPLY CURRENT vs FREQUENCY
Functional Pin Descriptions
VCC (Pin 28)
Provide a 12V bias supply for the IC to this pin. This pin also
provides the gate bias charge for all the MOSFETs
controlled by the IC. The voltage at this pin is monitored for
Power-On Reset (POR) purposes.
GND (Pin 17)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PGND (Pin 24)
This is the power ground connection. Tie the synchronous
PWM converter’s lower MOSFET source to this pin.
VAUX (Pin 16)
Connect this pin to the ATX 3.3V output. The voltage present
at this pin is monitored for sequencing purposes. This pin
provides the necessary base bias for the NPN pass
transistors, as well as the current sunk through the 5kVID
pull-up resistors.
SS13 (Pin 13)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the soft-start
interval of the synchronous switching converter (VOUT1) and
the AGP regulator (VOUT3). A VTTPG high signal is also
delayed by the time interval required by the charging of this
capacitor from 0V to 1.25V (see Soft-Start details).
SS24 (Pin 12)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the soft-start
interval of the standard buck converter. Pulling this pin below
0.8V induces a chip reset (POR) and shutdown.
VTTPG (Pin 9)
VTTPG is an open collector output used to indicate the
status of the standard buck regulator output voltage. This pin
is pulled low when the output is below the under-voltage
threshold or when the SS13 pin is below 1.25V.
5