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®
Data Sheet
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6526 makes simple work out of implementing a
complete control and protection scheme for a DC-DC
stepdown converter. Designed to drive N-Channel
MOSFETs in a synchronous buck topology, the ISL6526
integrates the control, output adjustment, monitoring and
protection functions into a single package.
The ISL6526 provides simple, single feedback loop, voltage-
mode control with fast transient response. The output
voltage can be precisely regulated to as low as 0.8V, with a
maximum tolerance of ±1.5% over temperature and line
voltage variations. A fixed frequency oscillator reduces
design complexity, while balancing typical application cost
and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from overcurrent conditions is provided by
monitoring the rDS(ON) of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Ordering Information
TEMP
PART NUMBER RANGE (oC)
PACKAGE PKG DWG. #
ISL6526CB
0 to 70 14 Lead SOIC M14.15
ISL6526ACB
0 to 70 14 Lead SOIC M14.15
ISL6526CR
0 to 70 16 Lead 5x5 QFN L16.5x5B
ISL6526ACR
0 to 70 16 Lead 5x5 QFN L16.5x5B
ISL6526IB
-40 to 85 14 Lead SOIC M14.15
ISL6526AIB
-40 to 85 14 Lead SOIC M14.15
ISL6526IR
-40 to 85 16 Lead 5x5 QFN L16.5x5B
ISL6526AIR
-40 to 85 16 Lead 5x5 QFN L16.5x5B
ISL6526EVAL1 ISL6526 SOIC Evaluation Board
ISL6526EVAL2 ISL6526 QFN Evaluation Board
ISL6526AEVAL1 ISL6526A SOIC Evaluation Board
ISL6526AEVAL2 ISL6526A QFN Evaluation Board
ISL6526
July 2003
FN9055.3
Features
• Operates from 3.3V to 5V Input
• 0.8V to VIN Output Range
- 0.8V Internal Reference
- ±1.5% Over Load, Line Voltage and Temperature
• Drives N-Channel MOSFETs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Cycle
• Lossless, Programmable Overcurrent Protection
- Uses Upper MOSFET’s rDS(on)
• Converter can Source and Sink Current
• Small Converter Size
- Internal Fixed Frequency Oscillator
- ISL6526: 300kHz
- ISL6526A: 600kHz
• Internal Soft-Start
• 14 Lead SOIC or 16 Lead, 5x5 QFN
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
Applications
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Subsystem Power Supplies
- PCI/AGP/GTL+ Busses
- ACPI Power Control
- DDR SDRAM Bus Termination Supply
• Cable Modems, Set Top Boxes, and DSL Modems
• DSP and Core Communications Processor Supplies
• Memory Supplies
• Personal Computer Peripherals
• Industrial Power Supplies
• 3.3V-Input DC-DC Regulators
• Low-Voltage Distributed Power Supplies
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

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Pinouts
14 LEAD (SOIC)
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET 6
FB 7
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 ENABLE
8 COMP
ISL6526
16 LEAD 5X5 (QFN)
TOP VIEW
16 15 14 13
CPVOUT 1
CT1 2
CT2 3
OCSET 4
12 PHASE
11 VCC
10 CPGND
9 NC
5678
Typical Application - 3.3V Input
3.3V
VIN
CIN
CPUMP
DISABLE
VCC
CT1 OCSET
ROCSET
CBULK
ISL6526
CT2
CPGND
GND
ENABLE
COMP
CPVOUT
BOOT
UGATE
PHASE
LGATE
FB
DBOOT
CBOOT
CDCPL
CHF
Q1 LOUT
Q2 COUT
CI
RF CF
ROFFSET
RFB
VOUT
2

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Typical Application - 5V Input
+5V
VIN
ISL6526
DISABLE
VCC
CT1 OCSET
ROCSET
N/C CT2
ISL6526
CPVOUT
DBOOT
CPGND
GND
BOOT
UGATE
PHASE
CBOOT
ENABLE
COMP
LGATE
FB
CIN
CBULK
CHF
Q1 LOUT
Q2 COUT
CI
RF CF
ROFFSET
RFB
VOUT
Block Diagram
VCC
CPVOUT
CT1
CT2
CPGND
OCSET
CHARGE
PUMP
20µA
+
-
OC
COMPARATOR
POWER-ON
RESET (POR)
SOFTSTART
+
0.8V
-
ERROR
AMP
+
-
PWM
COMPARATOR
+
-
GATE
CONTROL
PWM LOGIC
FB
COMP
3
OSCILLATOR
FIXED 300kHz or 600kHz
GND
ENABLE
BOOT
UGATE
PHASE
LGATE

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ISL6526
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7V
Absolute Boot Voltage, VBOOT . . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, VBOOT - VPHASE . . . . . . . . . . . +6.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.3V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . -40oC to 125oC
Thermal Information
Thermal Resistance
θJA (oC/W)
θJC (oC/W)
SOIC Package (Note 1) . . . . . . . . . . . .
67
N/A
QFN Package (Note 2). . . . . . . . . . . . .
35
5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
For Recommended soldering conditions see Tech Brief TB389.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. θJC, the
“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications Recommended Operating Conditions, unless otherwise noted VCC = 3.3V±5% and TA = 25°C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX
VCC SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
IBIAS
6.1 6.9 7.7
Rising CPVOUT POR Threshold
POR Commercial
4.25 4.30 4.42
Industrial
4.10 4.30 4.50
CPVOUT POR Threshold Hysteresis
0.3 0.6 0.9
OSCILLATOR
Frequency
fOSC
IC = ISL6526C, Commercial
IC = ISL6526I, Industrial
275 300 325
250 300 340
IC = ISL6526AC, Commercial
575 600 625
IC = ISL6526AI, Industrial
550 600 640
Ramp Amplitude
REFERENCE
VOSC
- 1.5 -
Reference Voltage Tolerance
- - 1.5
Nominal Reference Voltage
Charge Pump
VREF
- 0.800 -
Nominal Charge Pump Output
Charge Pump Output Regulation
VCPVOUT VVCC = 3.3V, No Load
- 5.1 -
-2-
ERROR AMPLIFIER
DC Gain
Guaranteed by Design
- 88 -
Gain-Bandwidth Product
GBWP
- 15 -
Slew Rate
SR
-6-
SOFT START
Soft Start Slew Rate
Commercial
6.2 - 7.3
Industrial
6.2 - 7.6
UNITS
mA
V
V
V
kHz
kHz
kHz
kHz
VP-P
%
V
V
%
dB
MHz
V/µs
ms
ms
4

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ISL6526
Electrical Specifications
PARAMETER
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION / DISABLE
OCSET Current Source
Disable Threshold
Recommended Operating Conditions, unless otherwise noted VCC = 3.3V±5% and TA = 25°C (Continued)
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
IUGATE-SRC VBOOT - VPHASE = 5V, VUGATE = 4V
IUGATE-SNK
ILGATE-SRC VVCC = 3.3V, VLGATE = 4V
ILGATE-SNK
IOCSET
VDISABLE
Commercial
Industrial
- -1 -
-1-
- -1 -
-2-
A
A
A
A
18 20 22
µA
16 20 22
µA
-
- 0.8
V
Functional Pin Description
14 LEAD (SOIC)
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET 6
FB 7
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 ENABLE
8 COMP
16 LEAD 5X5 (QFN)
TOP VIEW
16 15 14 13
CPVOUT 1
CT1 2
CT2 3
12 PHASE
11 VCC
10 CPGND
OCSET 4
9 NC
5678
VCC
This pin provides the bias supply for the ISL6526. Connect a
well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the internal
error amplifier and the COMP pin is the error amplifier
output. These pins are used to compensate the voltage-
control feedback loop of the converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the upper
MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-Channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the lower
MOSFET has turned off.
OCSET
Connect a resistor (ROCSET) from this pin to the drain of the
upper MOSFET (VIN). ROCSET, an internal 20µA current
source (IOCSET), and the upper MOSFET on-resistance
(rDS(ON)) set the converter overcurrent (OC) trip point
according to the following equation:
IPEAK = I--O-----C----S---r-E-D---T-S---x-(--RO-----ON----C)----S----E----T--
An overcurrent trip cycles the soft-start function.
5