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TM
Data Sheet
Dual Regulator - Standard Buck PWM
and Linear Power Controller
The ISL6528 provides the power control and protection for
two output voltages in high-performance graphics cards and
other embedded processor applications. The dual-output
controller drives an N-Channel MOSFET in a standard buck
topology and a NPN pass transistor in a linear conguration.
The ISL6528 provides both a regulated high current, low
voltage supply and an independent, lower current supply
integrated in an 8-lead SOIC package. The controller is ideal
for graphics card applications where both graphics
processing unit (GPU) and memory supplies are required.
The standard buck converter is a simple, single feedback
loop, voltage-mode control with fast transient response. Both
the switching regulator and linear regulator provide a
maximum static regulation tolerance of ±2% over line, load,
and temperature ranges. Each output is user-adjustable by
means of external resistors.
An integrated soft-start feature brings both supplies into
regulation in a controlled manner. Each output is monitored
via the FB pins for undervoltage events. If either output
drops below 52.5% of the internal reference voltage, both
regulators are shutdown.
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
PKG.
NO.
ISL6528CB
0 to 70
8 Ld SOIC M8.15
ISL6528CB-T
8Ld SOIC Tape and Reel
ISL6528EVAL1 Evaluation Board
Applications
Graphics–GPU and memory supplies
• ASIC power supplies
• Embedded processor and I/O supplies
• DSP supplies
February 2002
ISL6528
FN9038.1
Features
• Provides two regulated voltages
- One standard buck PWM
- One linear controller
• Small converter size
- 600kHz constant frequency operation
- Small external component count
• Excellent output voltage regulation
- Both outputs: ±2% over temperature
• Single 5V bias and bootstrap supply
• Output voltage range: 0.8V to 3.3V
• Simple single-loop voltage-mode PWM control design
• Fast PWM converter transient response
- High-bandwidth error amplier
- Full 0–100% duty ratio
• Linear controller drives bipolar linear pass transistor
• Fully-adjustable outputs
• Undervoltage fault monitoring on both outputs
Related Literature
• Technical Brief TB363 Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
Pinout
TOP VIEW
GND 1
VCC 2
DRIVE2 3
FB2 4
ISL6528
(SOIC)
8 UGATE
7 BOOT
6 COMP
5 FB
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, All Rights Reserved

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Block Diagram
VOLTAGE
REFERENCE
VCC
POWER-ON
RESET (POR)
FB2
DRIVE2
INHIBIT/SOFT-START
EA2
INHIBIT
SOFT-START
GND
OSCILLATOR
SHUTDOWN
SOFT-
START
AND FAULT
LOGIC
RESTART
INHIBIT
SOFT-START
PWM
UV2
EA1
COMP1
UV1
DRIVE1
FB COMP
BOOT
UGATE

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Simplified Power System Diagram
+5V
+3.3V
VOUT2
+
Q2
ISL6528
LINEAR
CONTROLLER
PWM
CONTROLLER
ISL6528
Q1
VOUT1
+
D1
Typical Application
+5V
+3.3V
CIN +
VOUT2
2.5V
Q2
+ COUT2
CBP
DRIVE2
FB2
VCC
BOOT
UGATE
ISL6528
FB
COMP
D2
Q1
PHASE
CBOOT
LOUT
D1
VOUT1
1.5V
+ COUT1
GND
3

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ISL6528
Absolute Maximum Ratings
UGATE, BOOT. . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to +10V
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to +7V
FB, DRIVE2, FB2, COMP, . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply Voltage on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Supply Voltage to drain of upper MOSFET . . . . . . . . . +3.3V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Nominal Supply Current
POWER-ON RESET
ICC UGATE and DRIVE2 Open
2 3.7 6.5
mA
Rising VCC Threshold
4.25 4.4 4.50
V
Falling VCC Threshold
3.75 3.8 4.00
V
OSCILLATOR AND SOFT-START
Free Running Frequency
Ramp Amplitude
Soft-Start Interval
REFERENCE VOLTAGE
FOSC
VOSC
TSS
550 600 650
- 1.5 -
3.10 3.42 3.75
kHz
VP-P
ms
Reference Voltage
System Accuracy
VREF
.784 0.800 .816
-2.00 - +2.00
V
%
PWM CONTROLLER ERROR AMPLIFIER
DC Gain
- 80 -
dB
Gain-Bandwidth Product
GBWP
15 - - MHz
Slew Rate
SR
- 6 - V/µs
Undervoltage Level (VFB/VREF)
PWM CONTROLLER GATE DRIVER
VUV
48.13 52.5 56.88
%
UGATE Source Impedance
UGATE Sink Impedance
LINEAR REGULATOR ERROR AMPLIFIER
RUGATE
RUGATE
VCC = 5V, VUGATE = 2.5V
VUGATE-PHASE = 2.5V
- 2.75 5.0
- 3.0 5.0
Output Drive Current
VCC > 4.5V
100 120
-
mA
Overvoltage Level (VFB2/VREF)
Undervoltage Level (VFB2/VREF)
VOV
VUV
150.0 160.0 175.0
48.13 52.5 56.88
%
%
4

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ISL6528
Functional Pin Descriptions
GND 1
VCC 2
DRIVE2 3
FB2 4
8 UGATE
7 BOOT
6 COMP
5 FB
GND (Pin 1)
Signal ground for the IC. All voltage levels are measured
with respect to this pin. Place via close to pin to minimize
impedance path to ground plane.
VCC (Pin 2)
Provide a well decoupled 5V bias supply for the IC to this
pin. The voltage at this pin is monitored for Power-On Reset
(POR) purposes.
DRIVE2 (Pin 3)
Connect this pin to the base terminal of an external bipolar
NPN transistor. This pin provides the base current drive for
the linear regulator pass transistor.
FB2 (Pin 4)
Connect the output of the linear regulator to this pin through
a properly sized resistor divider. The voltage at this pin is
regulated to 0.8V. This pin is also monitored for undervoltage
events.
Pulling and holding FB2 above 1.25V shuts down both
regulators. Releasing FB2 initiates soft-start on both
regulators.
FB (Pin 5) and COMP (Pin 6)
FB and COMP are the available external pins of the error
amplier. The FB pin is the inverting input of the error amplier
and the COMP pin is the error amplier output. These pins are
used to compensate the voltage-mode control feedback loop of
the standard buck converter.
BOOT (Pin 7)
Connect a suitable capacitor (0.47µF recommended) from
this pin to the source terminal of the upper MOSFET
(PHASE node). This bootstrap capacitor supplies the
UGATE driver the energy necessary to turn and hold the
upper MOSFET on. The absolute maximum voltage on
BOOT must be kept below 10V. This can be met with a 5V
VCC and 3.3V drain supply to the upper MOSFET.
UGATE (Pin 8)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the MOSFET.
Description
Operation Overview
The ISL6528 monitors and precisely controls two output
voltage levels. Refer to the Block Diagram, Simplied
Power System Diagram, and Typical Application Schematic
on pp. 2–3. The controller is intended for use in graphics
card or embedded processor applications with 3.3V and 5V
bias input available. The IC integrates both a standard buck
PWM controller and a linear controller. The PWM controller
is designed to regulate the high current GPU voltage
(VOUT1). The PWM controller drives a single N-Channel
MOSFET (Q1) in a standard buck converter conguration
and regulates the output voltage to a level programmed by
a resistor divider. The linear controller is designed to
regulate the lower current local memory voltage (VOUT2)
through an external NPN pass transistor.
Initialization
The ISL6528 automatically initializes upon application of
input power. Special sequencing of the input supplies is not
necessary. The POR function continually monitors the input
bias supply voltage at the VCC pin. The POR function
initiates soft-start operation after the 5V bias supply voltage
exceeds its POR threshold.
Soft-Start
The POR function initiates the digital soft-start sequence.
Both the linear regulator error amplier and PWM error
amplier reference inputs are forced to track a voltage level
proportional to the soft-start voltage. As the soft-start voltage
slews up, the PWM comparator regulates the output relative
to the tracked soft-start voltage slowly charging the output
capacitor(s). Simultaneously, the linear output follows the
smooth ramp of the soft-start function into normal regulation.
Figure 1 shows the soft-start sequence for a typical application.
At T0, the +5V VCC bias voltage starts to ramp followed by the
3.3V input supply. Once the voltage on VCC crosses the 4.4V
POR threshold at time T1, both outputs begin their soft-start
sequence. The triangle waveform from the PWM oscillator is
compared to the rising error amplier output voltage. As the
error amplier voltage increases, the pulse-width on the
UGATE pin increases to reach its steady-state duty cycle at
time T2. The error amplier reference of the linear controller
also rises relative to the soft-start reference. The resulting soft
ramp on DRIVE2 brings VOUT2 within regulation limits by time
T2.
Undervoltage Protection
The FB and FB2 pins are monitored during converter
operation by two separate undervoltage (UV) comparators. If
the FB voltage drops below 52.5% of the reference voltage
(0.42V), a fault signal is generated. The internal fault logic
5