ACPI Regulator/Controller for
Dual Channel DDR Memory Systems
The ISL6532A provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller
and integrated LDO to supply VDDQ with high current during
S0/S1 states and standby current during S3 state. During
S0/S1 state, a fully integrated sink-source regulator
generates an accurate (VDDQ/2) high current VTT voltage
without the need for a negative supply. A buffered version of
the VDDQ/2 reference is provided as VREF. An LDO
controller is also integrated for AGP core voltage regulation.
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. Both the switching
regulator and standby LDO provide a maximum static
regulation tolerance of ±2% over line, load, and temperature
ranges. The output is user-adjustable by means of external
resistors down to 0.8V.
Switching memory core output between the PWM regulator
and the standby LDO during state transitions is
accomplished smoothly via the internal ACPI control
circuitry. The NCH signal provides synchronized switching of
a backfeed blocking switch during the transitions eliminating
the need to route 5V Dual to the memory supply.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the PGOOD signal
indicates VTT is within spec and operational.
Each output is monitored for under and over-voltage events.
The switching regulator has over current protection. Thermal
shutdown is integrated.
ISL6532A (QFN) TOP VIEW
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• Generates 3 Regulated Voltages
- Synchronous Buck PWM Controller with Standby LDO
- 3A Integrated Sink/Source Linear Regulator with
Accurate VDDQ/2 Divider Reference.
- Glitch-free Transitions During State Changes
- LDO Regulator for 1.5V Video and Core voltage
• ACPI compliant sleep state control
• Integrated VREF Buffer
• PWM Controller Drives Low Cost N-Channel MOSFETs
• 250kHz Constant Frequency Operation
• Tight Output Voltage Regulation
- All Outputs: ±2% Over Temperature
• 5V or 3.3V Down Conversion
• Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V supports DDR and DDR2 Specifications
• Simple Single-Loop Voltage-Mode PWM Control Design
• Fast PWM Converter Transient Response
• Under and Over-voltage Monitoring on All Outputs
• OCP on the Switching Regulator
• Integrated Thermal Shutdown Protection
• QFN Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
• Single and Dual Channel DDR Memory Power Systems in
ACPI compliant PCs
• Graphics cards - GPU and memory supplies
• ASIC power supplies
• Embedded processor and I/O supplies
• DSP supplies
0 to 70
28 Ld 6x6 QFN
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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