PRINCIPLES OF OPERATION
The X88064 is a highly integrated peripheral device for a
wide variety of single-chip microcontrollers. The X88064
provides 8K bytes of E2PROM which can be used either
for Program Storage, Data Storage, or a combination of
both, in systems based upon Harvard (80XX) architec-
tures. The X88064 incorporates the interface circuitry
normally needed to decode the control signals and
demultiplex the Address/Data bus to provide a “Seam-
The interface inputs on the X88064 are conﬁgured such
that it is possible to directly connect them to the proper
interface signals of the appropriate single-chip microcon-
troller. In the Harvard type system, the reading of data
from the chip is controlled either by the PSEN or the RD
signal, which essentially maps the X88064 into both the
Program and the Data Memory address map.
The X88064 also features an advanced implementation
of the Software Data Protection scheme, called Block
Lock, which allows the device to be broken into 8 inde-
pendent sections of 1K bytes. Each of these sections can
be independently enabled for write operations; thereby
allowing certain sections of the device to be secured so
that updates can only occur in a controlled environment
(e.g. in an automotive application, only at an authorized
service center). The desired set-up conﬁguration is
stored in a nonvolatile register, ensuring the conﬁguration
data will be maintained after the device is powered down.
The X88064 also features a Write Control input (WC),
which serves as an external control over the completion
of a previously initiated page load cycle.
The X88064 also features the industry standard
E2PROM characteristics such as byte or page mode
write and Toggle Bit Polling.
DEVICE OPERATION MODES
Mixed Program/Data Memory
By properly assigning the address space, a single
X88064 can be used as both the Program and Data
Memory. This would be accomplished by connecting all
of the Microcontroller control outputs to the correspond-
ing inputs of the X88064.
The Data Storage can be fully protected by enabling
Block Lock Control.
Program Memory Mode
This mode of operation is read-only. The PSEN and ALE
inputs of the X88064 are tied directly to the PSEN and
ALE outputs of the microcontroller. The RD and WR
inputs are tied HIGH.
When ALE is HIGH, the A/D0–A/D7 and A8–A12
addresses ﬂow into the device. The addresses, both low
and high order, are latched when ALE transitions LOW
(VIL). PSEN will then go LOW and after tPLDV, valid data
is presented on the A/D0–A/D7 pins. CE must be LOW
during the entire operation.
Data Memory Mode
This mode of operation allows both read and write func-
tions. The PSEN input is tied to VIH or to VCC through a
pull-up resistor. The ALE, RD, and WR inputs are tied
directly to the microcontroller’s ALE, RD, and WR out-
This operation is quite similar to the Program Memory
read. A HIGH to LOW transition on ALE latches the
addresses and the data will be output on the A/D pins
after RD goes LOW (tRLDV).
A write is performed by latching the addresses on the fall-
ing edge of ALE. Then WR is strobed LOW followed by
valid data being presented at the A/D0–A/D7 pins. The
data will be latched into the X88064 on the rising edge of
WR. To write to the X88064, with the SDP feature
enabled, a three-byte command sequence must precede
the byte(s) being written. (See Software Data Protec-