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APPLICATION NOTE
A V A I LABLE
3 or 4 Cell Li-Ion BATTERY PACKS
PPrreelliimmiinnaarryy Information
X3100/X3101
4 cell / 3 cell
3 or 4 Cell Li-Ion Battery Protection and Monitor IC
FEATURE
• Software Selectable Protection Levels and
Variable Protect Detection/Release Times
• Integrated FET Drive Circuitry
• Cell Voltage and Current Monitoring
• 0.5% Accurate Voltage Regulator
• Integrated 4kbit EEPROM
• Flexible Power Management with 1µA Sleep
Mode
• Cell Balancing Control
BENEFIT
• Optimize protection for chosen cells to allow
maximum use of pack capacity.
• Reduce component count and cost
• Simplify implementation of gas gauge
• Accurate voltage and current measurements
• Record battery history to optimize gas gauge,
track pack failures and monitor system use
• Reduce power to extend battery life
• Increase battery capacity and improve cycle life
battery life
DESCRIPTION
The X3100 is a protection and monitor IC for use in
battery packs consisting of 4 series Lithium-Ion
battery cells. The X3101 is designed to work in 3 cell
applications. Both devices provide internal over-
charge, over-discharge, and over-current protection
circuitry, internal EEPROM memory, an internal
voltage regulator, and internal drive circuitry for
external FET devices that control cell charge,
discharge, and cell voltage balancing.
Over-charge, over-discharge, and over-current
thresholds reside in an internal EEPROM memory
register and are selected independently via software
using a 3MHz SPI serial interface. Detection and time-
out delays can also be individually varied using
external capacitors.
Using an internal analog multiplexer, the X3100 or
X3101 allow battery parameters such as cell voltage
and current (using a sense resistor) to be monitored
externally by a separate microcontroller with A/D
converter. Software on this microcontroller implements
gas gauge and cell balancing functionality in software.
The X3100 and X3101 contain a current sense
amplifier. Selectable gains of 10, 25, 80 and 160 allow
an external 10 bit A/D converter to achieve better
resolution than a more expensive 14 bit converter.
An internal 4kbit EEPROM memory featuring
IDLock, allows the designer to partition and “lock in”
written battery cell/pack data.
The X3100 and X3101 are each housed in a 28 Pin
TSSOP package.
FUNCTIONAL DIAGRAM
VCC RGP RGC RGO
UVP/OCP OVP/LMON
VCELL1
CB1
VCELL2
CB2
VCELL3
CB3
VCELL4/VSS
CB4
Over-charge
Over-discharge
Protection
Sense
Circuits
Protection
Sample Rate
Timer
Over-current
Protection &
Current Sense
5VDC
Regulator
FET Control
Circuitry
Internal Voltage Regulator
Power On reset &
Status Register
Protection Circuit
Timing Control
& Configuration
Configuration
Register
4 kbit
EEPROM
Control
Register
Analog
MUX
SPI
I/F
AS0
AS1
AS2
AO
S0
SCK
CS
SI
VSS
VCS1 VCS2 OVT UVT OCT
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X3100/X3101 – Preliminary Information
PRINCIPLES OF OPERATION
The X3100 and X3101 provide two distinct levels of
functionality and battery cell protection:
First, in Normal mode, the device periodically checks
each cell for an over-charge and over-discharge state,
while continuously watching for a pack over-current
condition. A protection mode violation results from an
over-charge, over-discharge, or over-current state. The
thresholds for these states are selected by the user
through software. When one of these conditions occur, a
Discharge FET or a Charge FET or both FETs are
turned off to protect the battery pack. In an over-
discharge condition, the X3100 and X3101 devices go
into a low power sleep mode to conserve battery power.
During sleep, the voltage regulator turns off, removing
power from the microcontroller to further reduce pack
current.
Second, in Monitor mode, a microcontroller with A/D
converter measures battery cell voltage and pack current
via pin AO and the X3100 or X3101 on-board MUX. The
user can thus implement protection, charge/discharge,
cell balancing or gas gauge software algorithms to suit
the specific application and characteristics of the cells
used. While monitoring these voltages, all protection
circuits are on continuously.
In a typical application, the microcontroller is also
programmed to provide an SMBus interface along with
the Smart Battery System interface protocols. These
additions allow an X3100 or X3101 based module to
adhere to the latest industry battery pack standards.
PIN CONFIGURATION
VCELL1
CB1
VCELL2
CB2
VCELL3
CB3
VCELL4/VSS*
CB4
VSS
VCS1
VCS2
OVT
UVT
OCT
28 Lead TSSOP
1 28
2 27
3 26
4 25
5 24
6 23
X3100/
7 X3101 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
*For X3101, Connect to ground.
VCC
RGP
RGC
RGO
UVP/OCP
OVP/LMON
CS
SCK
SO
SI
AS2
AS1
AS0
AO
PIN NAMES
Pin Symbol
Description
1 VCELL1 Battery cell 1 voltage input
2 CB1 Cell balancing FET control output 1
3 VCELL2 Battery cell 2 voltage
4 CB2 Cell balancing FET control output 2
5 VCELL3 Battery cell 3 voltage
6 CB3 Cell balancing FET control output 3
7
VCELL4/ Battery cell 4 voltage (X3100)
VSS Ground (X3101)
8 CB4 Cell balancing FET control output 4
9 VSS Ground
10 VCS1 Current sense voltage pin 1
11 VCS2 Current sense voltage pin 2
12 OVT Over-charge detect/release time input
13 UVT Over-discharge detect/release time input
14 OCT Over-current detect/release time input
15 AO Analog multiplexer output
16 AS0 Analog output select pin 0
17 AS1 Analog output select pin 1
18 AS2 Analog output select pin 2
19 SI Serial data input
20 SO Serial data output
21 SCK Serial data clock input
22 CS Chip select input pin
23
OVP/ Over-charge Voltage Protection output/
LMON Load Monitor output
24
UVP/ Over-discharge protection output/
OCP Over-current protection output
25 RGO Voltage regulator output pin
26 RGC Voltage regulator control pin
27 RGP Voltage regulator protection pin
28 VCC Power supply
PIN DESCRIPTIONS
Battery Cell Voltage (VCELL1-VCELL4):
These pins are used to monitor the voltage of each
battery cell internally. The voltage of an individual cell
can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors
3 battery cells. For the X3101 device connect the
VCELL4/VSS pin to ground.
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X3100/X3101 – Preliminary Information
Cell Voltage Balancing Control (CB1-CB4):
These outputs are used to switch external FETs in order
to perform cell voltage balancing control. This function
can be used to adjust individual cell voltages (e.g.
during cell charging). CB1–CB4 can be driven high
(Vcc) or low (Vss) to switch external FETs ON/OFF. When
using the X3101, the CB4 pin can be left unconnected,
or the FET control can be used for other purposes.
Current Sense Inputs (VCS1–VCS2):
A sense resistor (RSENSE) is connected between VCS1
and VCS2 (Figure 1). RSENSE has a resistance in the
order of 20mto 100m, and is used to monitor current
flowing through the battery terminals, and protect
against over-current conditions. The voltage at each end
of RSENSE can also be monitored at pin AO.
Over-charge Voltage detect Time control (OVT):
This pin is used to control the delay time (TOV)
associated with the detection of an over-charge
condition (see section “Over-charge Protection” on page
13).
Over-discharge detect/release time control (UVT):
This pin is used to control the delay times associated
with the detection (TUV) and release (TUVR) of an over-
discharge (under-voltage) condition (see section “Over-
discharge Protection” on page 15).
Over-current detect/release time control (OCT):
This pin is used to control the delay times associated
with the detection (TOC) and release (TOCR) of an over-
current condition (see section “Over-Current Protection”
on page 18).
Analog Output (AO):
The analog output pin is used to externally monitor
various battery parameter voltages. The voltages which
can be monitored at AO (see section “Analog
Multiplexer Selection” on page 20) are:
– Individual cell voltages
– Voltage across the current sense resistor (RSENSE).
This voltage is amplified with a gain set by the user in
the control register (see section “Current Monitor
Function” on page 20.)
The analog select pins pins AS0–AS2 select the desired
voltage to be monitored on the AO pin.
Analog Output Select (AS0–AS2):
These pins select which voltage is to be multiplexed to
the output AO (see section “Sleep Control (SLP)” on
page 10 and section “Current Monitor Function” on
page 20)
Serial Input (SI):
SI is the serial data input pin. All opcodes, byte
addresses, and data to be written to the device are input
on this pin.
Serial Output (SO):
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock. While CS is HIGH,
SO will be in a High Impedance state.
Note: SI and SO may be tied together to form one line
(SI/SO). In this case, all serial data communication with
the X3100 or X3101 is undertaken over one I/O line.
This is permitted ONLY if no simultaneous read/write
operations occur.
Serial Clock (SCK):
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin are latched on the rising edge of the clock
input, while data on the SO pin change after the falling
edge of the clock input.
Chip Select (CS):
When CS is HIGH, the device is deselected and the SO
output pin is at high impedance. CS LOW enables the
SPI serial bus.
Over-charge Voltage Protection/Load Monitor
(OVP/LMON):
This one pin performs two functions depending upon
the present mode of operation of the X3100 or X3101.
—Over-charge Voltage Protection (OVP)
This pin controls the switching of the battery pack charge
FET. This power FET is a P-channel device. As such,
cell charge is possible when OVP/LMON=VSS, and cell
charge is prohibited when OVP/LMON=VCC. In this
configuration the X3100 and X3101 turn off the charge
voltage when the cells reach the over-charge limit. This
prevents damage to the battery cells due to the
application of charging voltage for an extended period of
time (see section “Over-charge Protection” on page 13).
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X3100/X3101 – Preliminary Information
—Load Monitor (LMON)
In Over-current Protection mode, a small test current
(7.5µA typ.) is passed out of this pin to sense the load
resistance. The measured load resistance determines
whether or not the X3100 or X3101 returns from an
over-current protection mode (see section “Over-Current
Protection” on page 18).
Over-discharge (Under Voltage) Protection/
Over-current Protection (UVP/OCP):
Pin UVP/OCP controls the battery cell discharge via an
external power FET. This P-channel FET allows cell
discharge when UVP/OCP=Vss, and prevents cell
discharge when UVP/OCP=Vcc. The X3100 and X3101
turn the external power FET off when the X3100 or
X3101 detects either:
—Over-discharge Protection (UVP)
In this case, pin 24 is referred to as “Over-discharge
(Under-Voltage) protection (UVP)” (see section “Over-
discharge Protection” on page 15). UVP/OCP turns off
the FET to prevent damage to the battery cells by being
discharged to excessively low voltages.
—Over-current protection (OCP)
In this case, pin 24 is referred to as “Over-current
protection (OCP)” (see section “Over-Current Protection”
on page 18). UVP/OCP turns off the FET to prevent
damage to the battery pack caused by excessive current
drain (e.g. as in the case of a surge current resulting
from a stalled disk drive).
TYPICAL APPLICATION CIRCUIT
The X3100 and X3101 have been designed to operate
correctly when used as connected in the Typical
Application Circuit (see Figure 1 on page 5).
The power MOSFET’s Q1 and Q2 are referred to as the
“Discharge FET” and “Charge FET,” respectively. Since
these FETs are p-channel devices, they will be ON when
the gates are at VSS, and OFF when the gates are at
VCC. As their names imply, the discharge FET is used to
control cell discharge, while the charge FET is used to
control cell charge. Diode D1 allows the battery cells to
receive charge even if the Discharge FET is OFF, while
diode D2 allows the cells to discharge even if the charge
FET is OFF. D1 and D2 are integral to the Power FETs. It
should be noted that the cells can neither charge nor
discharge if both the charge FET and discharge FET are
OFF.
Power to the X3100 or X3101 is applied to pin VCC via
diodes D6 and D7. These diodes allow the device to be
powered by the Li-Ion battery cells in normal operating
conditions, and allow the device to be powered by an
external source (such as a charger) via pin P+ when the
battery cells are being charged. These diodes should
have sufficient current and voltage ratings to handle both
cases of battery cell charge and discharge.
The operation of the voltage regulator is described in
section “Voltage Regulator” on page 21. This regulator
provides a 5VDC±0.5% output. The capacitor (C1)
connected from RGO to ground provides some noise
filtering on the RGO output. The recommended value is
0.1µF or less. The value chosen must allow VRGO to
decay to 0.1V in 170ms or less when the X3100 or
X3101 enter the sleep mode. If the decay is slower than
this, a resistor (R1) can be placed in parallel with the
capacitor.
During an initial turn-on period (TPUR + TOC), VRGO has
a stable, regulated output in the range of 5VDC ± 10%
(see Figure 2). The selection of the microcontroller
should take this into consideration. At the end of this turn
on period, the X3100 and X3101 “self-tunes” the output
of the voltage regulator to 5V+/-0.5%. As such, VRGO
can be used as a reference voltage for the A/D converter
in the microcontroller. Repeated power up operations,
consistently re-apply the same “tuned” value for VRGO.
Figure 1 shows a battery pack temperature sensor
implemented as a simple resistive voltage divider,
utilizing a thermistor (RT) and resistor (RT’). The voltage
VT can be fed to the A/D input of a microcontroller and
used to measure and monitor the temperature of the
battery cells. RT’ should be chosen with consideration of
the dynamic resistance range of RT as well as the input
voltage range of the microcontroller A/D input. An output
of the microcontroller can be used to turn on the
thermistor divider to allow periodic turn-on of the sensor.
This reduces power consumption since the resistor
string is not always drawing current.
Diode D3 is included to facilitate load monitoring in an
Over-current protection mode (see section “Over-
Current Protection” on page 18), while preventing the
flow of current into pin OVP/LMON during normal
operation. The N-Channel transistor turns off this
function during the sleep mode.
Resistor RPU is connected across the gate and drain of
the charge FET (Q2). The discharge FET Q1 is turned
off by the X3100 or X3101, and hence the voltage at pin
OVP/LMON will be (at maximum) equal to the voltage of
the battery terminal, minus one forward biased diode
voltage drop (VP+–VD7). Since the drain of Q2 is
connected to a higher potential (VP+) a pull-up resistor
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X3100/X3101 – Preliminary Information
Figure 1. Typical Application Circuit
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