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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD78P4916
16-BIT SINGLE-CHIP MICROCONTROLLER
The µPD78P4916 is one of the µPD784915 subseries in the 78K/IV Series microcontrollers which incorporate
a high-speed and high-performance 16-bit CPU.
The µPD78P4916 replaces mask ROM with one-time PROM and increases on-chip ROM and RAM capacity
compared to the µPD784915.
It is suitable for evaluation at system development and for small quantity production.
Detailed descriptions of functions are provided in the following user's manuals. Be sure to read these
documents when designing.
µPD784915 Subseries User’s Manual – Hardware : U10444E
78K/IV Series User's Manual – Instruction : U10905E
FEATURES
High-speed instruction execution using 16-bit CPU core
• Minimum instruction execution time: 250 ns (at 8-MHz internal clock)
On-chip high capacity memory
• PROM : 62 Kbytes Note
• RAM : 2048 bytes Note
Note It is possible to change the capacity of the internal PROM and the internal RAM by specifying the internal
memory capacity select (IMS) register.
ORDERING INFORMATION
Part Number
µPD78P4916GF-3BA
Package
100-pin plastic QFP (14 × 20 mm)
The information in this document is subject to change without notice.
Document No. U11045EJ1V0DS00 (1st edition)
Date Published April 1996 P
Printed in Japan
*The mark shows major revised points.
©
1996

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78K/IV Series Products
78K/I Series
µPD78138
Subseries
µPD78148
Subseries
Enhanced peripheral
hardware
µPD78P4916
78K/IV Series
mµPD784915
Subbsseerriieess
High-performance 16-bit CPU core
High-speed operation
On-chip analog circuit for VCR
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µPD78P4916
Function List (1/2)
Item
Internal PROM capacity
Internal RAM capacity
Operation clock
Minimum instruction execution time
I/O ports
Real-time output port
Super
timer
unit
Timer/counter
Capture register
Special circuit for VCR
General purpose timer
PWM output
Serial interface
A/D converter
62 Kbytes Note
2048 bytes Note
Function
16 MHz (Internal clock: 8 MHz)
Low frequency oscillation mode: 8 MHz (Internal clock: 8 MHz)
Low power consumption mode: 32.768 kHz (Subsystem clock)
250 ns (at 8-MHz internal clock)
Total: 54 Input: 8
I/O: 46
11 (including 3 outputs each for Pseudo-VSYNC, Head amplifier switch, and Chromi-
nance rotate)
Timer/counter Compare register Capture register
Remark
TM0 (16-bit)
TM1 (16-bit)
FRC (22-bit)
TM3 (16-bit)
UDC (5-bit)
EC (8-bit)
EDV (8-bit)
3
3
2
1
4
1
1
6
1
– Generates HSW signal
– Divides CFG signal
Input signal
Number of bits Measurement cycle
Operation edge
CFG
DFG
HSW
VSYNC
CTL
TREEL
SREEL
22 125 ns to 524 ms ↑ ↓
22 125 ns to 524 ms
16 1 µs to 65.5 ms ↑ ↓
22 125 ns to 524 ms
16 1 µs to 65.5 ms ↑ ↓
22 125 ns to 524 ms ↑ ↓
22 125 ns to 524 ms ↑ ↓
• VSYNC separator, HSYNC separator
• VISS detector, Wide-aspect detector
• Field identifier
• Head amplifier switch/chrominance rotate output circuit
Timer
Compare register
Capture register
TM2 (16-bit)
TM4 (16-bit)
TM5 (16-bit)
1
1 (Capture/compare)
1
1
• 16-bit precision: 3 channels (Carrier frequency: 62.5 kHz)
• 8-bit precision: 3 channels (Carrier frequency: 62.5 kHz)
3-wire serial I/O: 2 channels
• BUSY/STRB control available (only 1 channel)
8-bit resolution × 12 channels, conversion time: 10 µs
Note It is possible to change the capacity of the internal PROM and the internal RAM by specifying the internal
memory capacity select (IMS) register.
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