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SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ GENERAL DESCRIPTIONS
SN6B000 is a 8-bit micro controller series with hi-density LCD driver. Combined
with one or more SN6BS00 (64-segment drivers), SN6B000 can form one 1024/
2048/ 4096/ 6144/ 8192 dots LCD system. A dual-tone melody and a voice
synthesizer are included in SN6B000. Also, a 7-bit current-type DAC and the
PWM circuit are built in SN6B000, so that makes users easily choose a speaker
(DA), or a buzzer (PWM) for their applications. SN6B000 only contains 32 COM
signals of LCD. All segment signals are provided by SN6BS00. Several
different types of LCD applications can be implemented by suitably combining
SN6B000 and SN6BS00. SN6B000 not only contains internal mask ROM itself
(128K words, MC mode), but also possesses the interface to access external
ROM (maximum 512K words, MP mode). A memory chip, SN6B400 consists of
256K-word mask ROM and is available to work with SN6B000 to accomplish the
whole micro-processor system.
Dots
Configuration
1024 1 SN6B000 + l SN6BS00
2048 1 SN6B000 + l SN6BS00
4096 1 SN6B000 + 2 SN6BS00
6144 1 SN6B000 + 3 SN6BS00
8192 1 SN6B000 + 4 SN6BS00
COM
16
32
32
32
32
SEG
64
64
128
192
256
1 December 20, 2000

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SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ FEATURES
Š ROM space: 512K words (=219*16=220*8); Program Space: 256K*16
MC mode:128K words in SN6B000
MP mode: along with SN6B400 to 256K words
Š RAM Size:
256 bytes in SN6B000
4*256 bytes in SN6BS00 (2*256 bytes LCD RAM, 2*256 bytes normal
RAM)
Š I/O Port : There are Port0 and Port1 (total 16 pins I/O)
All ports are I/O-type and P0.7 can be modulated with a carry signal
Each port can be set as “H”, ”L”, floating, and high-resistance “H”
(150K@5V )
Every port can wake up chip when chip is in power-down mode
Š 60 instructions
Š 8 levels stack buffer supports interrupt and call subroutine
Š System Clock:
2MHz RC oscillator
2M/ 4M(3.58M) crystal
Š Low speed clock: Register option, 32768 crystal or RC
Š Three different operation modes can be selected:
Normal mode (both High/Low osc. On).
Slow mode (High osc. Off, Low osc. On).
Stop mode (both High and Low osc. Off).
Š LCD: 1/16 duty (for 1024) or 1/32 duty, frame rate=64 or 128 Hz.
Š A voltage regulator and double voltage circuit is included in SN6BS000
Š 8 interrupt sources :
5 internal interrupts: T0, TC0, TC1, TW, SPEECH (non-maskable).
3 external interrupts: INTP0.0 ~ INTP0.2
ISR entry location: Reset: 0000, SPEECH: 0018h, and the others: 0008h
Š Voice:
Built-in voice synthesizer
Sampling rate from 4K to 40Khz
Dual tone melody with 4 octaves
7-bit DA converter (maximum 3mA)
PWM output for Buzzer
2 December 20, 2000

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SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ PIN ASSIGNMENT
SN6B000
Pin Name
I/O
Descriptions
C0~C31
VLC1, VLC4,
VLC5
VLCDR
P/C
A0~A19
D0~D7
CE1B
VO/ BUZ1
BUZ2
OSC/XIN
XOUT
CKSEL
LXIN
LXOUT
P0, P1
XCE_0
XCE_1
XCE_2
XCE_3
XD7~XD0
XA9~XA0
WR
FRAME
CL
M
SYNC
TEST
RESETB
VDD
GND
O Common 0 ~ 31
I LCD Bias
I LCD Bias
I Micro-processor/Micro-controller
O Address Bus for ROM
I/O Data Bus for ROM
O Chip Enable of External ROM.
O Voice out, 7-bit DA / PWM output
O PWM output
High speed Clock input:
CKSEL=L, RC oscillator
CKSEL=H, Crystal
O High Speed clock output
I High speed clock selection
( 0:2M RC oscillator, 1: Crystal)
I Low speed clock input
O Low speed clock output
I/O I/O Ports
O Chip Enable of SN6BS00 0
O Chip Enable of SN6BS00 1
O Chip Enable of SN6BS00 2
O Chip Enable of SN6BS00 3
I/O Data Bus to Slave Driver
O Address Bus to Slave Driver
O Read Write signal
O Frame Synchronous Signal
O Display Synchronous Signal
O Alternating signal for LCD
O Phase 1 synchronous pin.
I Test Pin
I Reset Pin
I Positive power supply
I Negative power supply
Internal
Pull-low
3 December 20, 2000

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SN6BS00:
Pin Name
S0~S63
VLCDR, VLC2, VLC3,
VLC5
VREG
VPS
VO1, VO2
XA0~XA9
XD0~XD7
XCE
WR
FRAME
CL
M
VDD
GND
SN6B000
Hi-Density LCD Driver with 8-bit Controller
I/O Descriptions
O Segment 0 ~ 63
I LCD Bias
O Voltage Pumper
I Voltage Pumper
I Voltage Pumper
I Address Bus
I/O Data Bus
I Chip Enable
I Read Write signal
I Frame Synchronous Signal
I Display Synchronous Signal
I Alternating signal for LCD
I Positive power supply
I Negative power supply
SN6B400:
Pin Name
VDD
CEB
SYNC
D7~D0
A18~A0
VSS
I/O Function Description
I Positive power supply
I Chip Enable. (Active Low)
I Clock Pin
O Data Output
I Address Input
I Negative power supply.
4 December 20, 2000

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SN6B000
Hi-Density LCD Driver with 8-bit Controller
„ ABSOLUTE MAXIMUM RATINGS
Supply voltage (Vdd)
Input in voltage (Vin) Vss
Operating ambient temperature (Topr)
Storage ambient temperature (Tstor)
Power consumption (Pc)
(All of the voltages referenced to Vss)
- 0.3V ~ 6.0V
- 0.2V ~ Vdd + 0.2V
0°C ~ + 70°C
-30°C ~ + 125°C
500 mW
„ ELECTRICAL CHARACTERISTICS
SN6B000
PARAMETER
SYM.
DESCRIPTION
Operating voltage
Vdd
Operating current
IddH Vdd = 5.0V, I/O pin unload, normal
mode
Idds Vdd = 5.0V,I/O pin unload, slow
mode
Istby Vdd = 5.0V,I/O pin unload, stop
mode
Reset, TEST pin
ViH
input voltage
ViL
Reset, TEST leakage ILekg Vin = Vdd
current
I/P port input voltage ViH
ViL
I/P port pull-up resistor Rup Vin = Vss
I/P port input leakage Ilekg Pull-up resistor disable, Vin = Vdd
current
Port0,1 output source
Current
IoH Vop = Vdd - 0.5V
Port0,1 output sink
Current
IoL Vop = Vss + 0.5V
LCD supply voltage
Vlcd
LCD frame frequency Flcd
Vo output Current
Ivo DA output current
BU1,BU2 Driving
Current
BU1,BU2 Sinking
Current
INTP0 trigger pulse
width
IdBU PWM driving current ability.
VBU1/BU2=2.5V
IsBU PWM sinking current ability.
VBU1/BU2=2.5V
Tint01 P0.0 ~ P0.2 Interrupt request pulse
width
Oscillator frequency fHxosc Rosc=300K
MIN.
3.9
-
TYP.
-
1
MAX. UNIT
5.1 V
- mA
- 15 - uA
- - 1 uA
0.7Vdd -
-V
- - 0.3Vss
- - 1 uA
0.8Vdd -
-V
- - 0.2Vss
- 150 - K
- - 1 uA
1 2 - mA
2 4 - mA
- - 6.5 V
- 64/128 - Hz
- 3 4 mA
- 60 - mA
- 60 - mA
1/fcpu -
-S
- 2 - MHz
5 December 20, 2000