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WM8143-12
12-bit/4MSPS CCD Signal Processor
Production Data Nov. 1999 Rev 4
Description
The WM8143-12 integrates the analogue signal
conditioning required by CCD sensors with a 12-bit ADC.
The WM8143-12 requires minimal external circuitry and
provides a cost-effective sensor to digital domain system
solution.
Each of the three analogue conditioning channels
includes reset level clamp, CDS, fine offset level shifting
and programmable gain amplification. The three channels
are multiplexed into the ADC. The output from the ADC is
fed to the output bus pins OP[11:0] via a 12/8 bit
multiplexer, enabled by the OEB signal.
The flexible output architecture allows twelve-bit data to
be accessed either on a twelve-bit bus or via a time-
multiplexed eight-bit bus. The WM8143-12 can be
configured for pixel-by-pixel or line-by-line multiplexing
operation. Reset level clamp and/or CDS features can be
optionally bypassed. The device configuration is
programmed either via a simple serial interface or via an
eight-bit parallel interface.
The serial/parallel interfaces of the WM8143-12 are
control compatible with those of the WM8144-10 and
WM8144-12.
Features
Reset level clamp
Correlated double sampling (CDS)
Fine offset level shifting
Programmable gain amplification
12-bit ADC with maximum 4 MSPS
Simple clocking scheme
Control by serial or parallel interface
Time multiplexed eight-bit data output mode
32 pin TQFP package
Interface compatible with WM8144-10 and
WM8144-12
Applications
Flatbed scanners
Sheet feed scanners
Film scanners
CCD sensor interfaces
Contact image sensor (CIS) interfaces
Block Diagram
VRLC
VRU VRT
VRB
VMID
VSMP MCLK RLC
AGND DGND DVDD AVDD
VMID
RINP
GINP
BINP
CL RS VS
S/H
S/H
CDS
S/H
S/H
CDS
MUX
PGA
5-BIT REG
PGA
5-BIT REG
S/H
S/H
CDS
PGA
5-BIT REG
TIMING CONTROL
OFFSET
++
8-BIT +
SIGN DAC
VMID
OFFSET
++
8-BIT +
SIGN DAC
VMID
OFFSET
++
8-BIT +
SIGN DAC
VMID
M
U
X
WM8143-12
12-bit
ADC
12/8
MUX
CONFIGURABLE
SERIAL/PARALLEL
CONTROL INTERFACE
OEB
OP[11:0]
SDI / DNA
SCK / RNW
SEN / STB
NRESET
Production Data datasheets contain
final specifications current on
publication date. Supply of products
conforms to Wolfson
Microelectronics' terms and
conditions.
Wolfson Microelectronics ©1999 Wolfson Microelectronics Ltd.
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386 Fax +44 (0) 131 667 5176
email: sales@wolfson.co.uk
www: http://www.wolfson.co.uk

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WM8143-12
Pin Configuration
Ordering Information
DEVICE
WM8143-12CFT/V
TEMP. RANGE
0 - 70oC
Production Data
PACKAGE
32 Pin TQFP
SCK/RNW
RLC
VSMP
MCLK
DGND
OP[0]
OP[1]
DVDD
25
26
27
28
29
30
31
32
WM8143-12
16 VRT
15 VRB
14 VRU
13 AGND
12 AVDD
11 NRESET
10 OP[11]
9 OP[10]
Absolute Maximum Ratings
Analogue Supply Voltage .......... AGND - 0.3V, AGND +7V Operating Temperature Range, TA .......... 0°C to +70°C
Digital Supply Voltage ...............DGND - 0.3V, DGND +7V Storage Temperature.......................... -50°C to +150°C
Digital Inputs .......................... DGND - 0.3V, DVDD +0.3V Lead Temperature (10 second soldering)......... +260°C
Digital Outputs ....................... DGND - 0.3V, DVDD +0.3V
Reference Inputs ....................AGND - 0.3V, AVDD +0.3V
RINP, GINP, BINP..................AGND - 0.3 V, AVDD +0.3V
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are
given under Electrical Characteristics at the test conditions specified
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore
generically susceptible to damage from excessive static voltages. Proper ESD precautions must
be taken during handling and storage of this device.
As per JEDEC specifications A112-A and A113-B, this product requires specific storage
conditions prior to surface mount assembly. It has been classified as having a Moisture
Sensitivity Level of 2 and as such will be supplied in vacuum-sealed moisture barrier bags.
Recommended Operating Conditions
PARAMETER
Supply Voltage
Operating Temperature Range
Input Common Mode Range
SYMBOL
AVDD, DVDD
TA
VCMR
TEST
CONDITIONS
MIN
4.75
0
0.5
TYP
MAX
5.25
70
4.5
UNIT
V
oC
V
Wolfson Microelectronics
2
PD. Rev 4 Nov. 99

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Production Data
Electrical Characteristics
WM8143-12
Test Characteristics
AVDD = DVDD = 4.75V to 5.25V, AGND = DGND = 0V … TA = 0oC to +70oC, MCLK = 8MHz, unless otherwise stated
PARAMETER
Supply Current - Active
Supply Current - Standby
Digital Inputs
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Digital Outputs
High Level Output Voltage
Low Level Output Voltage
High Impedance Output
Current
Input Multiplexer
CDS Mode Full Scale Input
Range (VVS-VRS)
Channel to Channel Gain
Matching
Input Video Set-up Time
Input Video Hold Time
Reset Video Set-up Time
Reset Video Hold Time
Reference String
Reference Voltage - Top
Reference Voltage - Bottom
DAC Reference Voltage
R.L.C. Switching Impedance
Reset Level Clamp Options
Impedance VRT to VRB
Impedance VRU to AGND
8-Bit DACs
Resolution
Zero Code Voltage
SYMBOL
TEST
CONDITIONS
MIN
VIH 0.8*DVDD
VIL
IIH
IIL
VOH
IOH = 1mA
DVDD-0.75
VOL IOL = 1mA
IOZ
x denotes the
channel selected
tVSU
tVH
tRSU
tRH
VRT
VRB
VMID
VRLC
CDS Mode only
CDS Mode only
VRU = 5V
VRU = 5V
VRU = 5V
VRU = 5V
Voltage set
by register
configuration
10
15
10
15
3.47
1.47
2.47
1.46
2.46
3.46
250
1000
8
VMID -20
TYP
25
4
5
MAX
40
10
UNIT
mA
mA
0.2*DVDD
1
1
V
V
µA
µA
pF
DGND+0.75
1
V
V
µA
2
Gx
1
3.5
1.5
2.5
500
1.5
2.5
3.5
500
1500
Vp-p
%
ns
ns
ns
ns
3.53
1.53
2.53
1.54
2.54
3.54
750
2000
V
V
V
V
V
V
VMID +20
Bits
mV
Wolfson Microelectronics
PD. Rev 4 Nov. 99
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WM8143-12
Production Data
Test Characteristics
AVDD = DVDD = 4.75V to 5.25V, AGND = DGND = 0V … TA = 0oC to +70oC, MCLK = 8MHz, unless otherwise stated
PARAMETER
SYMBOL
TEST
CONDITIONS
Full Scale Voltage Error
Differential Non Linearity
DNL
Integral Non Linearity
INL
12-bit ADC performance including CDS, PGA and Offset Functions
NO MISSING CODES GUARANTEED
Resolution
AVDD = DVDD = 5V
Maximum Sampling Rate
AVDD = DVDD = 5V
Zero Scale Transition Error
Voltage at VINP
DAC Code = 000H,
AVDD = DVDD = 5V,
measured relative to
VRB
Full Scale Transition Error
Voltage at VINP
DAC Code = 000H,
AVDD = DVDD = 5V,
measured relative to
VRT
Differential Non Linearity
DNL
AVDD = DVDD = 5V
PGA Gain
Monotonicity Guaranteed
Red Channel Max Gain
Gr Mode 1
AVDD = DVDD = 5V
Green Channel Max Gain
Gg
Blue Channel Max Gain
Gb
Switching Characteristics
MCLK Period
tPER
MCLK High
tCKH
MCLK Low
tCKL
Data Set-up Time
tDSU
Data Hold Time
tDH
Output Propagation Delay
Output Enable Time
tPD
tPZE
IOH = 1mA, IOL = 1mA
Output Disable Time
tPEZ
Serial Interface
SCK Period
tSPER
SCK High
tSCKH
SCK Low
tSCKL
SDI Set up Time
tSSU
SDI Hold Time
tSH
Set up Time - SCK to SEN
tSCE
MIN
0
12
4
7.5
7.5
7.5
125
37.5
37.5
10
10
125
37.5
37.5
10
10
20
TYP
0.1
0.25
± 25
± 25
8
8
8
MAX
20
0.5
1
UNIT
mV
LSB
LSB
±100
Bits
MSPS
mV
±100
mV
+1.5
LSB
Times
Times
Times
ns
ns
ns
ns
ns
75 ns
50 ns
25 ns
ns
ns
ns
ns
ns
ns
Wolfson Microelectronics
PD. Rev 4 Nov. 99
4

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Production Data
WM8143-12
Test Characteristics
AVDD = DVDD = 4.75V to 5.25V, AGND = DGND = 0V … TA = 0oC to +70oC, MCLK = 8MHz, unless otherwise stated
PARAMETER
SYMBOL
Set up Time - SEN to SCK
SEN Pulse Width
Parallel Interface
RNW Low to OP[11:4] Tri-
state
Address Setup Time to STB
Low
DNA Low Setup Time to STB
Low
Strobe Low Time
Address Hold Time from STB
High
DNA Low Hold Time from
STB High
Data Setup Time to STB Low
DNA High Setup Time to STB
Low
Data Hold Time from STB
High
Data High Hold Time from
STB High
RNW High to OP[11:4]
Output
tSEC
tSEW
tOPZ
tASU
tADLS
tSTB
tAH
tADLH
tDSU
tADHS
tDH
tADHH
tOPD
TEST
CONDITIONS
MIN
20
50
0
10
50
10
10
0
10
10
10
0
TYP
MAX
20
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Wolfson Microelectronics
5
PD. Rev 4 Nov. 99