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I5216 SERIES
Advanced Information
PRELIMINARY
8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH
INTEGRATED CODEC
GENERAL DESCRIPTION
The ChipCorder I5216 is an 8 to 16 minute Voice and Data Record and Playback system with
integrated Voice band CODEC. The device works on a single 2.7V to 3.3V supply, and has fully
integrated system functions, including: AGC, microphone preamplifier, speaker driver, memory and
CODEC. The CODEC meets the PCM conformance specification of the G.714 recommendation. Its µ-
Law and A-law compander meets the specification of the ITU-T G.711 recommendation.
FEATURES
Single Supply 2.7 to 3.3 Volt operation
Voice and digital data record and playback system on a single chip
Industry-leading sound quality
Low voltage operation
Message management
Fully integrated system functions
Flexible architecture
Nonvolatile message storage
Configurable ChipCorder sampling rates of 4 kHz, 5.3kHz, 6.4 kHz and 8kHz
8, 10, 12 and 16 minutes duration
External or internal Voice recorder clock
I2C serial interface (400kHz)
Configurable analog paths
2.2V Microphone Bias Pin
100 year message retention (typical)
100K analog record cycles (typical)
10K digital record cycles (typical)
Full-duplex (not in I2S mode) single channel speech CODEC with :
o External 13.824 MHz, 27.648 MHz, 20.48 MHz or 40.96 MHz master clock
o I2S and PCM digital audio interface ports
o Serial transfer data rate from 64 to 3072 Kbps
o Short and Long frame sync formats
o 2s complement and signed magnitude data format
o Complete µ-Law and A-Law companding
o Linear 14 bit ∆Σ PCM CODEC-filter for A/D and D/A converter
o 8 kHz or 44.1 kHz – 48 kHz digital audio sampling rate options
o Analog receive and transmit gain adjust
o Configurable setup through the I2C interface
Publication Release Date: November 30, 2001
-1 Revision A1

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I5216 SERIES
Advanced Information
PRELIMINARY
TABLE OF CONTENTS
GENERAL DESCRIPTION .......................................................................................................1
FEATURES.............................................................................................................................. 1
PIN LAYOUT & DESCRIPTIONS ............................................................................................ 4
I5216 BLOCK DIAGRAMS....................................................................................................... 6
FUNCTIONAL DESCRIPTION ................................................................................................ 8
SPEECH/SOUND QUALITY....................................................................................... 8
DURATION ................................................................................................................. 8
FLASH STORAGE...................................................................................................... 9
MICROCONTROLLER INTERFACE.......................................................................... 9
PROGRAMMING ........................................................................................................ 9
APPLICATIONS....................................................................................................................... 9
INTERNAL REGISTERS ....................................................................................................... 14
MEMORY ORGANIZATION .................................................................................................. 17
OPERATION MODES............................................................................................................ 17
I2C PORT ............................................................................................................................... 17
I2C SLAVE ADDRESS ........................................................................................................... 18
I2C OPERATION DEFINITIONS ............................................................................................ 19
I2C CONTROL REGISTERS.................................................................................................. 21
COMMAND BYTE.................................................................................................................. 21
FUNCTION BITS ................................................................................................................... 21
REGISTER BITS.................................................................................................................... 22
OPCODE SUMMARY ............................................................................................................ 22
DATABYTES.......................................................................................................................... 24
POWER-UP SEQUENCE..................................................................................................... 25
SET MASTER CLOCK DIVISION RATIO............................................................................. 25
PLAYBACK MODE ..................................................................................... ......................... 26
RECORD MODE...................................................................................................... ............ 26
FEED THROUGH MODE ........................................................................................ ............ 26
CALL RECORD ....................................................................................................... ............ 30
MEMO RECORD ..................................................................................................... ............ 31
MEMO & CALL PLAYBACK..................................................................................... ............ 32
MESSAGE CUEING ................................................................................................ ............ 34
ANALOG MODE ...................................................................................................... ............ 34
Publication Release Date: November 30, 2001
-2 Revision A1

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I5216 SERIES
Advanced Information
PRELIMINARY
AUTO MUTE & AUTO GAIN FUNCTIONS ............................................................. ............ 37
VOLUME CONTROL DESCRIPTION ..................................................................... ............ 38
SPEAKER & AUX OUT DESCRIPTION .................................................................. ............ 39
MICROPHONE INPUTS .......................................................................................... ............ 40
DIGITAL MODE ....................................................................................................... ............ 41
WRITING DATA.................................................................................................................... 41
READING DATA ................................................................................................................... 41
ERASING DATA ................................................................................................................... 41
EXAMPLE COMMAND SEQUENCES ................................................................................. 42
PIN DETAILS ........................................................................................................................ 45
DIGITAL I/O PINS.................................................................................................... 45
ANALOG I/O PINS................................................................................................... 48
AUXILIARY OUTPUT .............................................................................................. 49
AUXILIARY INPUT .................................................................................................. 50
POWER & GROUND PINS ..................................................................................... 51
SAMPLE LAYOUT FOR PDIP ................................................................................. 52
ELECTRICAL CHARACTERISTICS..................................................................................... 53
ABSOLUTE MAXIMUM RATINGS FOR PACKAGED PARTS................................ 53
ABSOLUTE MAXIMUM RATINGS FOR DIE........................................................... 53
OPERATING CONDITIONS FOR PACKAGED PARTS ......................................... 53
OPERATING CONDITIONS FOR DIE .................................................................... 54
GENERAL PARAMETERS ................................................................................................... 54
TIMING PARAMETERS........................................................................................................ 55
ANALOG PARAMETERS ..................................................................................................... 57
I2C INTERFACE TIMING ...................................................................................................... 60
CODEC PARAMETERS ....................................................................................................... 61
TIMING DIAGRAMS ............................................................................................................. 62
I2C SERIAL INTERFACE TECHNICAL INFORMATION ...................................................... 69
I2S SERIAL INTERFACE TECHNICAL INFORMATION ...................................................... 73
DEVICE PHYSICAL DIMENSIONS ...................................................................................... 77
DIE BONDING PHYSICAL LAYOUT .................................................................................... 80
ORDERING INFORMATION…………………………………………………………................. 82
Publication Release Date: November 30, 2001
-3 Revision A1

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ISD5216 Pin Layout
VSSA
SDI
SDIO
RAC
INT
MCLK
VCCD
VCCD
SCL
A1
SDA
A0
VSSD
VSSD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I5S2D156216
28-PIN TSOP
I5216 SERIES
Advanced Information
PRELIMINARY
VCCD
SCL
1
2
28 VCCD
27 MCLK
A1 3
26 INT
SDA 4
25 RAC
28 WS
A0 5
24 SDIO
27 SCK
26 NC
25 AUX OUT
24 AUX IN
23 VCCA
22 SP+
VSSD
6
23 SDI
VSSD 7 ISI5D2512616 22 VSSA
VSSA
8
21 WS
MIC+ 9
20 SCK
21 VSSA
20 SP-
19 ACAP
MIC-
MICBS
10
11
19 NC
18 AUX OUT
18 MICBS
ACAP
12
17 AUX IN
17 MIC-
16 MIC+
SP- 13
16 VCCA
15 VSSA
VSSA
14
15 SP+
PDIPPD/SIOPIC
VCCD
SCL
A1
SDA
VSSD
VSSD
A0
MICBS
MIC-
MIC+
VSSA
ACAP
SP-
VSSA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I5216
SOIC
28 VCCD
27 MCLK
26 INT
25 RAC
24 SDIO
23 VSSA
22 SDI
21 NC
20 AUX OUT
19 SCK
18 WS
17 AUX IN
16 VCCA
15 SP+
Publication Release Date: November 30, 2001
-4 Revision A1

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I5216 SERIES
Advanced Information
PRELIMINARY
PIN DESCRIPTION
Pin Name Pin No. Pin No.
RAC
28-pin
TSOP
4
28-pin
PDIP
25
/INT 5 26
MCLK 6 27
SCL
SDA
A0
A1
MIC+
MIC-
MICBS
ACAP
SP+
SP-
AUX IN
AUX OUT
SDI
SDIO
WS
SCK
VCCD
9
11
12
10
16
17
18
19
22
20
24
25
2
3
28
27
7,8
2
4
5
3
9
10
11
12
15
13
17
18
23
24
21
20
1,28
VSSD
VSSA
VCCA
13,14
1,15,21
23
6,7
8,14,22
16
NC 26 19
Pin No. Functionality
28-pin
SOIC
25
26
27
2
4
7
3
10
9
8
12
15
13
17
20
22
24
18
19
1,28
5,6
11,14,23
16
21
Row Address Clock; an open drain output. The RAC pin goes LOW
TRACLO1 before the end of each row of memory, and returns HIGH
at exactly the end of each row of memory.
Interrupt Output; an open drain output indicating that a set EOM bit
has been found during Playback, or that the chip is in an Overflow
(OVF) condition. This pin remains LOW until a Read Status
command is executed.
This pin allows the internal clock of the Voice record/playback
system to be externally driven for enhanced timing precision. This
pin is grounded for most applications. It is required for the CODEC
operation.
Serial Clock Line is part of the I2C serial bus. It is used to clock the
data into and out of the I2C interface.
Serial Data Line is part of the I2C serial bus. Data is passed
between devices on the bus over this line.
Input pin that supplies the LSB for the I2C Slave Address.
Input pin that supplies the LSB +1 bit for the I2C Slave Address.
Differential positive Input to the microphone amplifier.
Differential negative Input to the microphone amplifier.
Microphone Bias Voltage
AGC Capacitor connection. Required for the on-chip AGC amplifier.
Differential Positive Speaker Driver Output.
Differential Negative Speaker Driver Output. When the speaker
outputs are in use, the AUX OUT output is disabled.
Auxiliary Input. This is one of the gain adjustable analog inputs for
the device.
Auxiliary Output. This is one the analog outputs for the device.
When this output is in use, the SP+ and SP- outputs are disabled.
Serial Digital Audio PCM Input.
Serial Digital Audio PCM Output or I2S Input/Output.
Digital audio PCM Frame sync (FS) or I2S Word Sync (WS).
Digital audio PCM or I2S Serial Clock.
Positive Digital Supply pins. These pins carry noise generated by
internal clocks in the chip. They must be carefully bypassed to
Digital Ground to ensure correct device operation.
Digital Ground pins.
Analog Ground pins.
Positive Analog Supply pin. This pin supplies the low level audio
sections for the device. It should be carefully bypassed to Analog
Ground to ensure correct device operation.
No Connection
1 See parameters section of the datasheet.
-5
Publication Release Date: November 30, 2001
Revision A1