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2001.04.16 Ver. 2.0
MITSUBISHI LSIs
M5M5Y416CWG -85HI
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
Those are summarized in the part name table below.
DESCRIPTION
FEATURES
The M5M5Y416C is a f amily of low v oltage 4-Mbit static RAMs
organized as 262144-words by 16-bit, f abricated by Mitsubishi's
high-perf ormance 0.18µm CMOS technology .
The M5M5Y416C is suitable f or memory applications where a
simple interf acing , battery operating and battery backup are the
important design objectiv es.
M5M5Y416CWG is packaged in a CSP (chip scale package),
with the outline of 7.0mm x 8.5mm, ball matrix of 6 x 8 (48ball)
and ball pitch of 0.75mm. It giv es the best solution f or
a compaction
of mounting area as well as f lexibility of wiring pattern of printed
circuit boards.
- Single 1.65~2.3V power supply
- Small stand-by current: 0.2µA (2.0V, ty p.)
- No clocks, No ref resh
- Data retention supply v oltage =1.5V
- All inputs and outputs are TTL compatible.
- Easy memory expansion by S1, S2, BC1 and BC2
- Common Data I/O
- Three-state outputs: OR-tie capability
- OE prev ents data contention in the I/O bus
- Process technology : 0.18µm CMOS
- Package: 48ball 7.0mm x 8.5mm CSP
Version,
Operating
temperature
Part name
Power Access time
Supply
max.
I-version M5M5Y416CWG -85HI 1.65 ~ 2.3V
-40 ~ +85°C
85ns
Stand-by c urrent (µA)
* Ty pical
Ratings (max.)
25°C 40°C 25°C 40°C 70°C 85°C
0.2 0.4 1 2 8 15
Activ e
current
Icc1
(2.3V, max)
30mA
(10MHz)
3mA
(1MHz)
PIN CONFIGURATION
(TOP VIEW)
* Typical parameter indicates the value for the center
of distribution at 2.0V, and not 100% tested.
1 23 456
A BC1 OE A0 A1 A2 S2
B DQ16 BC2 A3 A4 S1 DQ1
C DQ14 DQ15 A5
A6 DQ2 DQ3
D GND DQ13 A17 A7 DQ4 VCC
E NCor
VCC DQ12 G N D * A16
DQ5 GND
F DQ11 DQ10 A14 A15 DQ7 DQ6
G DQ9 N.C. A12 A13 W DQ8
H N C A8
A9 A10 A11 N.C.
Pin Function
A0 ~ A17 Address input
DQ1 ~ DQ16 Data input / output
S1 Chip select input 1
S2 Chip select input 2
W
OE
BC1
BC2
Write control input
Output enable input
Lower By te (DQ1 ~ 8)
Upper By te (DQ9 ~ 16)
Vcc Power supply
GND Ground supply
Outline: 48FJA
NC: No Connection
*Don't connect E3 ball to v oltage lev el more than 0V
MITSUBISHI ELECTRIC
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2001.04.16 Ver. 2.0
MITSUBISHI LSIs
M5M5Y416CWG -85HI
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
FUNCTION
The M5M5Y416CWG is organized as 262144-words by
16-bit. These dev ices operate on a single +1.65~2.3V
power supply , and are directly TTL compatible to both
input and output. Its f ully static circuit needs no clocks
and no ref resh, and makes it usef ul.
The operation mode are determined by a combination
of t he dev ice control inputs BC1 , BC2 , S1, S2 , W
and OE. Each mode is summarized in the f unction
table.
A write operation is executed whenev er the low lev el
W ov erlaps with the low lev el BC1 and/or BC2 and the
low lev el S1 and the high lev el S2. The
address(A0~A17) must be set up bef ore the write cycle
and must be stable during the entire cy c le.
A read operation is executed by s etting W at a high
lev el and OE at a low lev el while BC1 and/or BC2 and
S1 and S2 are in an activ e state(S1=L,S2=H).
When setting BC1 at the high lev el and other pins are
in an activ e stage , upper-by te are in a selectable mode
in which both reading and writing are enabled, and lower-
by t e are in a non-selectable mode. And when setting
BC2 at a high lev el and other pins are in an activ e
stage, lower-by te are in a selectable mode and upper-
by t e are in a non-selectable mode.
BLOCK DIAGRAM
When setting BC1 and BC2 at a high lev el or S1 at a high
lev el or S2 at a low lev el, the chips are in a non-selectable
mode in which both reading and writing are disabled. In this
mode, the output stage is in a high-impedance state,
allowing OR-tie with other chips and memory expansion by
BC1, BC2 and S1, S2.
The power supply current is reduced as low as 0.2µA(25°C,
ty pical), and the memory data can be held at +1.5V power
supply , enabling battery back-up operation during power
f ailure or power-down operation in the non-selected mode.
FUNCTION TABLE
S1 S2 BC1 BC2 W OE Mode DQ1~8 DQ9~16 Icc
H L X X X X Non selection High-Z High-Z Standby
L L X X X X Non selection High-Z High-Z Standby
H H X X X X Non selection High-Z High-Z Standby
X X H H X X Non selection High-Z High-Z Standby
L H L H L X Write Din High-Z Activ e
L H L H H L Read Dout High-Z Activ e
L HL HH H
High-Z High-Z Activ e
L H H L L X Write High-Z Din Activ e
L H H L H L Read High-Z Dout Activ e
L HH L H H
High-Z High-Z Activ e
L H L L L X Write Din Din Activ e
L H L L H L Read Dout Dout Activ e
L HL L H H
High-Z High-Z Activ e
A0
A1 MEMORY ARRAY
DQ
1
262144 WORDS
x 16 BITS
A16 -
A17
DQ
8
DQ
9
S1
CLOCK
GENERATOR
S2
DQ
16
BC1
BC2
Vcc
W
GND
OE
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2001.04.16 Ver. 2.0
MITSUBISHI LSIs
M5M5Y416CWG -85HI
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Vcc Supply v oltage
VI Input v oltage
VO Output v oltage
Pd Power dissipation
Operating
T a temperature
T stg Storage temperature
Conditions
With respect to GND
With respect to GND
With respect to GND
Ta=25°C
I-v ersion
Ratings
-0.5* ~ +2.7
-0.2* ~ Vcc + 0.2 (max. 2.7V)
0 ~ Vcc
700
Units
V
mW
- 40 ~ +85
°C
- 65 ~ +150
°C
* -0.7V in case of AC (Pulse width <= 30ns)
DC ELECTRICAL CHARACTERISTICS
( Vcc=1.65~ 2.3V, unless otherwise noted)
Symbol
Parameter
Conditions
Limits
Min Ty p Max Units
VIH High-lev el input v oltage
0.7 x Vcc
Vcc+0.2V
VIL Low-lev el input v oltage
VOH High-level output voltage
IOH= -0.1mA
-0.2 *
1.3
0.4
V
VOL Low-lev el output v oltage IOL=0.1mA
0.2
II Input leakage current
VI =0 ~ Vcc
IO Output leakage current BC1 and BC2=VIH or S1=VIH or S2=VIL or OE=VIH, VI/O=0 ~ Vcc
±1 µA
±1
Icc1 Activ e supply c urrent
( AC,MOS lev el )
Activ e supply c urrent
Icc2
( AC,TTL lev el )
Icc3 Stand by s upply current
( AC,MOS lev el )
BC1 and BC2<= 0.2V, S1<= 0.2V, S2 Vcc-0.2V
other inputs <= 0.2V or => Vcc-0.2V
Output - open (duty 100%)
BC1 and BC2=VIL , S1=V IL ,S2=V IH
other pins =V IH or VIL
Output - open (duty 100%)
(1) S1 => Vcc - 0.2V,
S2 => Vcc - 0.2V,
other inputs = 0 ~ Vcc
(2) S2 <= 0.2V,
other inputs = 0 ~ Vcc
(3) BC1 and BC2 =>Vcc - 0.2V
S1 <= 0.2V, S2=> Vcc - 0.2V
other inputs = 0 ~ Vcc
f = 10MHz
f = 1MHz
f = 10MHz
f = 1MHz
~ +25°C
~ +40°C
~ +70°C
~ +85°C
- 18 30
- 1.5
3
- 18 30
- 1.5 3
- 0.2 1
- 0.4 2
- -8
- - 15
mA
µA
Icc4
Stand by s upply current
( AC,TTL lev el )
BC1 and BC2=VIH or S1=VIH or S2=VIL
Other inputs= 0 ~ Vcc
- - 0.5 mA
Note 1: Direction for current flowing into IC is indicated as positive (no mark)
* -0.7V in case of AC (Pulse width <= 30ns)
Note 2: Typical parameter indicates the value for the center of distribution at 2.0V, and not 100% tested.
CAPACITANCE
Symbol Parameter
CI Input capacitance
CO Output capacitance
(Vcc=1.65 ~ 2.3V, unless otherwise noted)
Conditions
VI=GND, VI=25mVrms, f =1MHz
VO=GND,VO=25mVrms, f =1MHz
Limits
Min Ty p Max
10
10
Units
pF
MITSUBISHI ELECTRIC
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