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80C187
80-BIT MATH COPROCESSOR
Y High Performance 80-Bit Internal
Architecture
Y Implements ANSI IEEE Standard 754-
1985 for Binary Floating-Point
Arithmetic
Y Upward Object-Code Compatible from
8087
Y Fully Compatible with 387DX and 387SX
Math Coprocessors Implements all 387
Architectural Enhancements over 8087
Y Directly Interfaces with 80C186 CPU
Y 80C186 80C187 Provide a Software
Binary Compatible Upgrade from
80186 82188 8087 Systems
Y Expands 80C186’s Data Types to
Include 32- 64- 80-Bit Floating-Point
32- 64-Bit Integers and 18-Digit BCD
Operands
Y Directly Extends 80C186’s Instruction
Set to Trigonometric Logarithmic
Exponential and Arithmetic
Instructions for All Data Types
Y Full-Range Transcendental Operations
for SINE COSINE TANGENT
ARCTANGENT and LOGARITHM
Y Built-In Exception Handling
Y Eight 80-Bit Numeric Registers Usable
as Individually Addressable General
Registers or as a Register Stack
Y Available in 40-Pin CERDIP and 44-Pin
PLCC Package
(See Packaging Outlines and Dimensions Order 231369)
The Intel 80C187 is a high-performance math coprocessor that extends the architecture of the 80C186 with
floating-point extended integer and BCD data types A computing system that includes the 80C187 fully
conforms to the IEEE Floating-Point Standard The 80C187 adds over seventy mnemonics to the instruction
set of the 80C186 including support for arithmetic logarithmic exponential and trigonometric mathematical
operations The 80C187 is implemented with 1 5 micron high-speed CHMOS III technology and packaged in
both a 40-pin CERDIP and a 44-pin PLCC package The 80C187 is upward object-code compatible from the
8087 math coprocessor and will execute code written for the 80387DX and 80387SX math coprocessors
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1992
Order Number 270640-004

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80C187
Figure 1 80C187 Block Diagram
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80C187
79 78
80C187 Data Registers
64 63
R0 SIGN EXPONENT
SIGNIFICAND
R1
R2
R3
R4
R5
R6
R7
0
15
CONTROL REGISTER
STATUS REGISTER
TAG WORD
0
15 0
INSTRUCTION POINTER
DATA POINTER
Figure 2 Register Set
FUNCTIONAL DESCRIPTION
The 80C187 Math Coprocessor provides arithmetic
instructions for a variety of numeric data types It
also executes numerous built-in transcendental
functions (e g tangent sine cosine and log func-
tions) The 80C187 effectively extends the register
and instruction set of the 80C186 CPU for existing
data types and adds several new data types as well
Figure 2 shows the additional registers visible to pro-
grams in a system that includes the 80C187 Essen-
tially the 80C187 can be treated as an additional
resource or an extension to the CPU The 80C186
CPU together with an 80C187 can be used as a sin-
gle unified system
CPU automatically controls the 80C187 whenever a
numerics instruction is executed All physical memo-
ry and virtual memory of the CPU are available for
storage of the instructions and operands of pro-
grams that use the 80C187 All memory addressing
modes are available for addressing numerics oper-
ands
The end of this data sheet lists by class the instruc-
tions that the 80C187 adds to the instruction set
NOTE
The 80C187 Math Coprocessor is also referred to
as a Numeric Processor Extension (NPX) in this
document
A 80C186 system that includes the 80C187 is com-
pletely upward compatible with software for the
8086 8087
The 80C187 interfaces only with the 80C186 CPU
The interface hardware for the 80C187 is not imple-
mented on the 80C188
PROGRAMMING INTERFACE
The 80C187 adds to the CPU additional data types
registers instructions and interrupts specifically de-
signed to facilitate high-speed numerics processing
All new instructions and data types are directly sup-
ported by the assembler and compilers for high-level
languages The 80C187 also supports the full
80387DX instruction set
All communication between the CPU and the
80C187 is transparent to applications software The
Data Types
Table 1 lists the seven data types that the 80C187
supports and presents the format for each type Op-
erands are stored in memory with the least signifi-
cant digit at the lowest memory address Programs
retrieve these values by generating the lowest ad-
dress For maximum system performance all oper-
ands should start at even physical-memory address-
es operands may begin at odd addresses but will
require extra memory cycles to access the entire op-
erand
Internally the 80C187 holds all numbers in the ex-
tended-precision real format Instructions that load
operands from memory automatically convert oper-
ands represented in memory as 16- 32- or 64-bit
integers 32- or 64-bit floating-point numbers or 18-
digit packed BCD numbers into extended-precision
real format Instructions that store operands in mem-
ory perform the inverse type conversion
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