80C32E.pdf 데이터시트 (총 20 페이지) - 파일 다운로드 80C32E 데이타시트 다운로드

No Preview Available !

Features
8032 Pin and Instruction Compatible
Four 8-bit I/O Ports
Three 16-bit Timer/Counters
256 bytes RAM
Full-duplex UART
Asynchronous Port Reset
6 Sources, 2 Level Interrupt Structure
64 Kbytes Program Memory Space
64 Kbytes Data Memory Space
Power Control Modes
Idle Mode
Power-down Mode
On-chip Oscillator
Operating Frequency: 30 MHz
Power Supply: 4.5V to 5.5V
Temperature Range: Military (-55oC to 125oC)
No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2
Tested up to a Total Dose of 30 krads (Si) according to MIL STD 883 Method 1019
Packages: Side Brazed 40-pin, MQFPJ 44-pin
QML Q and V with SMD 5962-00518
SCC C an B with Specification SCC9521002
Rad. Tolerant
8-bit ROMless
Microcontroller
80C32E
Description
The 80C32E is a radiation tolerant ROMless version of the 80C52 single chip 8-bit
microcontroller.
The 80C32E retains all the features of the 80C32 with 256 bytes of internal RAM, a 6-
source, 2-level interrupt system, an on-chip oscillator and three 16-bit timer/counters.
The fully static design of the 80C32E reduces system power consumption by bringing
the clock frequency down to any value, even DC, without loss of data.
The 80C32E has 2 software-selectable modes of reduced activity for further reduction
in power consumption. In the idle mode the CPU is frozen while the timers, the serial
port and the interrupt system are still operating. In the power-down mode the RAM is
saved and all other functions are inoperative.
Rev. 4149M–AERO–06/04
1

No Preview Available !

Block Diagram
XTAL1
XTAL2
ALE
PSEN
EA
RD
WR
CPU
UART
RAM
256x8
Parallel I/O Ports & Ext. Bus
Port 0Port 1 Port 2 Port 3
C51
CORE
IB-bus
INT Timer 0 Timer 1 Timer 2
Ctrl
Pin Configuration
P1.0/T2
P1.1/T2EX
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
P3.0/RxD
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SB40
40 VCC
39 P0.0/A0
38 P0.1/A1
37 P0.2/A2
36 P0.3/A3
35 P0.4/A4
34 P0.5/A5
33 P0.6/A6
32 P0.7/A7
31 EA/VPP
30 ALE
29 PSEN
28 P2.7/A15
27 P2.6/A14
26 P2.5/A13
25 P2.4/A12
24 P2.3/A11
23 P2.2/A10
22 P2.1/A9
21 P2.0/A8
P1.5
P1.6
P1.7
RST
P3.0/RxD
NIC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
6 5 4 3 2 1 44 43 42 41 40
7 39
8 38
9 37
10 36
11 35
12
MQFPJ44
34
13 33
14 32
15 31
16 30
17 29
18 19 20 21 22 23 24 25 26 27 28
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
EA
NIC*
ALE
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
Note: NIC: No Internal Connection
2 80C32E
4149M–AERO–06/04

No Preview Available !

Pin Description
80C32E
Mnemonic
VSS
VCC
P0.0-P0.7
P1.0-P1.7
P2.0-P2.7
P3.0-P3.7
RST
Type Name and Function
I Ground: 0V reference
I
Power Supply: This is the power supply voltage for normal, idle and
power-down operation
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that
have 1s written to them float and can be used as high impedance inputs.
Port 0 pins must be polarized to Vcc or Vss in order to prevent any
I/O parasitic current consumption. Port 0 is also the multiplexed low-order
address and data bus during access to external program and data
memory. In this application, it uses strong internal pull-up when emitting
1s.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1
I/O pins that have 1s written to them are pulled high by the internal pull-ups
and can be used as inputs. As inputs, Port 1 pins that are externally
pulled low will source current because of the internal pull-ups.
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2
pins that have 1s written to them are pulled high by the internal pull-ups
and can be used as inputs. As inputs, Port 2 pins that are externally
pulled low will source current because of the internal pull-ups. Port 2
I/O emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that use 16-bit
addresses (MOVX @DPTR).In this application, it uses strong internal
pull-ups emitting 1s. During accesses to external data memory that use
8-bit addresses (MOVX @Ri), port 2 emits the contents of the P2 SFR.
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3
pins that have 1s written to them are pulled high by the internal pull-ups
and can be used as inputs. As inputs, Port 3 pins that are externally
pulled low will source current because of the internal pull-ups. Port 3 also
serves the special features of the 80C51 family, as listed below.
I RXD (P3.0): Serial input port
O TXD (P3.1): Serial output port
I INT0 (P3.2): External interrupt 0
I INT1 (P3.3): External interrupt 1
I T0 (P3.4): Timer 0 external input
I T1 (P3.5): Timer 1 external input
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
Reset: A high on this pin for two machine cycles while the oscillator is
I running, resets the device. An internal diffused resistor to VSS permits a
power-on reset using only an external capacitor to VCC.
4149M–AERO–06/04
3