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Features
AVR® - High Performance and Low Power RISC Architecture
118 Powerful Instructions - Most Single Clock Cycle Execution
2K bytes of In-System Reprogrammable Flash
– SPI Serial Interface for Program Downloading
– Endurance: 1,000 Write/Erase Cycles
128 bytes EEPROM
– Endurance: 100,000 Write/Erase Cycles
128 bytes Internal RAM
32 x 8 General Purpose Working Registers
15 Programmable I/O Lines
VCC: 2.7 - 6.0V
Fully Static Operation
– 0 - 10 MHz, 4.0 - 6.0V
– 0 - 4 MHz, 2.7 - 6.0V
Up to 10 MIPS Throughput at 10 MHz
One 8-Bit Timer/Counter with Separate Prescaler
One 16-Bit Timer/Counter with Separate Prescaler
and Compare and Capture Modes
Full Duplex UART
Selectable 8, 9 or 10 bit PWM
External and Internal Interrupt Sources
Programmable Watchdog Timer with On-Chip Oscillator
On-Chip Analog Comparator
Low Power Idle and Power Down Modes
Programming Lock for Software Security
20-Pin Device
Description
The AT90S2313 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock
cycle, the AT90S2313 achieves throughputs approaching 1 MIPS per MHz allowing
the system designer to optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working regis-
ters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed
in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
(continued)
Pin Configuration
8-Bit
Microcontroller
with 2K bytes
In-System
Programmable
Flash
AT90S2313
Rev. 0839DS–07/98
Note: This is a summary document. For the complete 68 page
datasheet, please visit
mail at literature@atme
our
l.co
web s
m and
ite at w
request
ww.atmel.com or e1-
literature #0839D.

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Block Diagram
Figure 1. The AT90S2313 Block Diagram
The AT90S2313 provides the following features: 2K bytes
of In-System Programmable Flash, 128 bytes EEPROM,
128 bytes SRAM, 15 general purpose I/O lines, 32 general
purpose working registers, flexible timer/counters with
compare modes, internal and external interrupts, a pro-
grammable serial UART, programmable Watchdog Timer
with internal oscillator, an SPI serial port for Flash Memory
downloading and two software selectable power saving
modes. The Idle Mode stops the CPU while allowing the
SRAM, timer/counters, SPI port and interrupt system to
continue functioning. The power down mode saves the reg-
ister contents but freezes the oscillator, disabling all other
chip functions until the next interrupt or hardware reset.
The device is manufactured using Atmel’s high density
non-volatile memory technology. The on-chip In-System
Programmable Flash allows the program memory to be
reprogrammed in-system through an SPI serial interface or
by a conventional nonvolatile memory programmer. By
combining an enhanced RISC 8-bit CPU with In-System
Programmable Flash on a monolithic chip, the Atmel
AT90S2313 is a powerful microcontroller that provides a
highly flexible and cost effective solution to many embed-
ded control applications.
The AT90S2313 AVR is supported with a full suite of pro-
gram and system development tools including: C compil-
ers, macro assemblers, program debugger/simulators, in-
circuit emulators, and evaluation kits.
2 AT90S2313

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AT90S2313
Pin Descriptions
VCC
Supply voltage pin.
GND
Ground pin.
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port. Port pins can pro-
vide internal pull-up resistors (selected for each bit). PB0
and PB1 also serve as the positive input (AIN0) and the
negative input (AIN1), respectively, of the on-chip analog
comparator. The Port B output buffers can sink 20mA and
can drive LED displays directly. When pins PB0 to PB7 are
used as inputs and are externally pulled low, they will
source current if the internal pull-up resistors are activated.
Port B also serves the functions of various special features
of the AT90S2313 as listed on page 38.
Port D (PD6..PD0)
Port D has seven bi-directional I/O pins with internal pull-up
resistors, PD6..PD0. The Port D output buffers can sink 20
mA. As inputs, Port D pins that are externally pulled low will
source current if the pull-up resistors are activated.
Port D also serves the functions of various special features
of the AT90S2313 as listed on page 43.
RESET
Reset input. A low on this pin for two machine cycles while
the oscillator is running resets the device.
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier
Figure 2. Oscillator Connections
Figure 3. External Clock Drive Configuration
Crystal Oscillator
XTAL1 and XTAL2 are input and output, respectively, of an
inverting amplifier which can be configured for use as an
on-chip oscillator, as shown in Figure 2. Either a quartz
crystal or a ceramic resonator may be used. To drive the
device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven as shown in Figure 3.
3