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93AA46, 93LC46, 93C46
93AA46A/B, 93LC46A/B, 93C46A/B
1K Microwire® Serial EEPROM
Device Selection Table
Part
Number
93AA46
93LC46
93C46
93AA46A
93AA46B
93LC46A
93LC46B
93C46A
93C46B
VCC
Range
1.8-5.5
2.5-5.5
4.5-5.5
1.8-5.5
1.8-5-5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
Org Pin Word Size
Temp
Ranges
Yes 8 or 16-bit
I
Yes 8 or 16-bit I, E
Yes 8 or 16-bit I, E
No 8-bit
I
No 16-bit
I
No 8-bit
I, E
No 16-bit
I, E
No 8-bit
I, E
No 16-bit
I, E
Features
• Low power CMOS technology
• ORG pin for selectable memory configuration
• No org pin for dedicated word sizes
- 128 x 8-bit organization ‘A’ version devices
- 64 x 16-bit organization ‘B’ version devices
• Self-timed ERASE and WRITE cycles (including
auto-erase)
• Automatic ERAL before WRAL
• Power on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device status signal during ERASE/WRITE cycles
• Sequential READ function
• 1,000,000 E/W cycles
• Data retention > 200 years
• 8-pin MSOP and 6-pin SOT
• Temperature ranges supported:
- Industrial (I):
-40°C to +85°C
- Automotive (E)
-40°C to +125°C
Package Types
MSOP
CS
CLK
DI
DO
1
2
3
4
8 VCC
7 NU
6 ORG*
5 VSS
* Org pin is not available on A/B devices
Description
The Microchip Technology Inc. 93AA46, 93LC46,
93C46, 93AA46A/B, 93LC46A/B & 93C46A/B are 1K
low voltage serial Electrically Erasable PROMs
(EEPROM). Generic memory devices such as the
93AA46, 93LC46 or 93C46 are dependent upon exter-
nal logic levels driving the ORG pin to set word size.
For dedicated 8-bit communication, the 93AA46A,
93LC46A or 93C46A devices are selected, while the
93AA46B, 93LC46B and 93C46B devices are selected
for 16 bits. Advanced CMOS technology makes these
devices ideal for low power, non-volatile memory
applications. This 93XX Series is available in standard
8-lead MSOP and 6-lead SOT-23 packages.
Block Diagram
VCC VSS
MEMORY
ARRAY
ADDRESS
DECODER
DI
ORG*
CS
DATA REGISTER
MODE
DECODE
LOGIC
ADDRESS
COUNTER
OUTPUT
BUFFER
DO
CLK
CLOCK
REGISTER
* Org input is not available on A/B devices
SOT-23**
DO 1
VSS 2
DI 3
6 VCC
5 CS
4 CLK
** SOT-23 device only offered in A/B versions
2002 Microchip Technology Inc.
DS21749A-page 1

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93XX46, 93XX46A/B
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temp. with power applied ..........................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
DC CHARACTERISTICS
DC CHARACTERISTICS
VCC = +1.8V to +5.5V
Industrial (I): TAMB = -40°C to +85°C
Automotive (E): TAMB = -40°C to +125°C
Param.
No.
Sym
Characteristic
Min Typ Max Units
Conditions
D1 VIH1 High level input voltage 2.0
— VCC +1
VIH2
0.7 VCC — VCC +1
D2 VIL1 Low level input voltage -0.3 — 0.8
VIL2
-0.3 — 0.2 VCC
D3 VOL1 Low level output voltage —
— 0.4
VOL2
— — 0.3
D4 VOH1 High level output voltage 2.4 — —
VOH2
VCC-0.2
D5 ILI Input leakage current
— — ±10
D6 ILO Output leakage current —
— ±10
D7 CIN, Pin capacitance
COUT (all inputs/outputs)
—— 7
D8 ICC write Operating current
—— 3
D9 ICC read
—— 1
— — 500
— 100 —
D10 ICCS2 Standby current
—— 1
—— 5
Note 1: This parameter is tested at TAMB = 25°C and FCLK = 1 MHz.
2: This parameter is periodically sampled and not 100% tested.
3: Org pin not available on ‘A’ or ‘B’ versions.
V VCC 2.7V
V VCC < 2.7V
V VCC 2.7V
V VCC < 2.7V
V IOL = 2.1 mA, VCC = 4.5V
V IOL = 100 µA, VCC = 2.5V
V IOH = -400 µA, VCC = 4.5V
V IOH = -100 µA, VCC = 2.5V
µA VIN = 0.1V to VCC
µA VOUT = 0.1V to VCC
pF VIN/VOUT = 0V (Note 1 & 2)
TAMB = 25°C, FCLK = 1 MHz
mA FCLK = 2 MHz, VCC = 5.5V
mA FCLK = 2 MHz, VCC = 5.5V
µA FCLK = 1 MHz, VCC = 3.0V
µA FCLK = 1 MHz, VCC = 2.5V
µA I-Temp
µA E-Temp
CLK = CS = 0V
ORG = DI = VSS or VCC
(Note 3)
DS21749A-page 2
2002 Microchip Technology Inc.

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93XX46, 93XX46A/B
AC CHARACTERISTICS
AC CHARACTERISTICS
VCC = +1.8V to +5.5V
Industrial (I):
TAMB = -40°C to +85°C
Automotive (E): TAMB = -40°C to +125°C
Param.
No.
Sym
Characteristic
Min Typ Max Units
Conditions
1 FCLK Clock frequency
— — 2 MHz VCC 4.5V
— — 1 MHz VCC < 4.5V
2 TCKH Clock high time
250 — — ns
3 TCKL Clock low time
250 — — ns
4 TCSS Chip select setup time 50 — — ns Relative to CLK
5 TCSH Chip select hold time
0 — — ns Relative to CLK
6 TCSL Chip select low time
250 — — ns
7 TDIS Data input setup time
100 — — ns Relative to CLK
8 TDIH Data input hold time
100 — — ns Relative to CLK
9 TPD Data output delay time — — 400 ns CL = 100 pF
10
TCZ Data output disable time
— 100 ns CL = 100 pf (Note 2)
11 TSV Status valid time
— — 500 ns CL = 100 pF
12 TWC Program cycle time
— 4 10 ms ERASE/WRITE mode
1.5 2 ms 93CXX devices only
13 TEC
— 8 15 ms ERAL mode (VCC=5V ±10%)
14 TWL
— 16 30 ms WRAL mode (VCC=5V ±10%)
15 — Endurance
1M — 1M cycles 25°C, VCC = 5.0V, ERAL/
WRAL (Note 3)
Note 1: This parameter is tested at TAMB = 25°C and FCLK = 1 MHz.
2: This parameter is periodically sampled and not 100% tested.
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model which can be obtained on Microchip’s website:
www.microchip.com.
FIGURE 1-1:
SYNCHRONOUS DATA TIMING
CS VIH
VIL
VIH
CLK
VIL
VIH
DI
VIL
DO VOH
(READ) VOL
DO VOH
(WRITE)
VOL
42
78
9
11
3
9
STATUS VALID
5
10
10
2002 Microchip Technology Inc.
DS21749A-page 3

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93XX46, 93XX46A/B
TABLE 1-1: INSTRUCTION SET FOR X 16 ORGANIZATION (B - VERSION DEVICES OR ORG = 1)
Instruction SB Opcode
Address
Data In
ERASE
1
11 A5 A4 A3 A2 A1 A0
ERAL 1 00 1 0 X X X X —
EWDS
1
00 0 0 X X X X
EWEN
1
00 1 1 X X X X
READ
1
10 A5 A4 A3 A2 A1 A0
WRITE
1
01 A5 A4 A3 A2 A1 A0 D15 - D0
WRAL 1 00 0 1 X X X X D15 - D0
Data Out
(RDY/BSY)
(RDY/BSY)
HIGH-Z
HIGH-Z
D15 - D0
(RDY/BSY)
(RDY/BSY)
Req. CLK Cycles
9
9
9
9
25
25
25
TABLE 1-2:
Instruction
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
INSTRUCTION SET FOR X 8 ORGANIZATION (A - VERSION DEVICES OR ORG = 0)
SB Opcode
Address
Data In Data Out Req. CLK Cycles
1 11 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY)
10
1 00 1 0 X X X X X — (RDY/BSY)
10
1 00 0 0 X X X X X —
HIGH-Z
10
1 00 1 1 X X X X X —
HIGH-Z
10
1 10 A6 A5 A4 A3 A2 A1 A0 —
D7 - D0
18
1
01
A6 A5 A4 A3 A2 A1 A0 D7 - D0
(RDY/BSY)
18
1
00
0 1 X X X X X D7 - D0
(RDY/BSY)
18
DS21749A-page 4
2002 Microchip Technology Inc.

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2.0 FUNCTIONAL DESCRIPTION
When the ORG* pin is connected to VCC, the (x16)
organization is selected. When it is connected to
ground, the (x8) organization is selected. Instructions,
addresses and write data are clocked into the DI pin on
the rising edge of the clock (CLK). The DO pin is nor-
mally held in a high-Z state except when reading data
from the device, or when checking the READY/BUSY
status during a programming operation. The ready/
busy status can be verified during an Erase/Write oper-
ation by polling the DO pin; DO low indicates that pro-
gramming is still in progress, while DO high indicates
the device is ready. The DO will enter the high-Z state
on the falling edge of the CS.
2.1 START Condition
The START bit is detected by the device if CS and DI
are both HIGH with respect to the positive edge of CLK
for the first time.
Before a START condition is detected, CS, CLK, and DI
may change in any combination (except to that of a
START condition), without resulting in any device oper-
ation (READ, WRITE, ERASE, EWEN, EWDS, ERAL,
and WRAL). As soon as CS is HIGH, the device is no
longer in the Standby mode.
An instruction following a START condition will only be
executed if the required amount of opcode, address
and data bits for any particular instruction is clocked in.
After execution of an instruction (i.e., clock in or out of
the last required address or data bit) CLK and DI
become don't care bits until a new START condition is
detected.
93XX46, 93XX46A/B
2.2 Data In/Data Out (DI/DO)
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the READ operation, if A0 is a logic
HIGH level. Under such a condition the voltage level
seen at Data Out is undefined and will depend upon the
relative impedances of Data Out and the signal source
driving A0. The higher the current sourcing capability of
A0, the higher the voltage at the Data Out pin.
2.3 Data Protection
During power-up, all programming modes of operation
are inhibited until VCC exceeds a typical voltage level of
1.5V for 'AA' and 'LC' devices or 3.8V for 'C' devices.
During power-down, the source data protection cir-
cuitry acts to inhibit all programming modes when VCC
falls below 1.4V for 'AA' and 'LC' devices or 3.5V for 'C'
devices.
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before any ERASE or WRITE instruction can
be executed.
*Org pin is not available on A/B devices
2002 Microchip Technology Inc.
DS21749A-page 5