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Features
Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
Three-wire Serial Interface
2 MHz Clock Rate (5V)
Self-timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
Automotive Grade, Extended Temperature and Lead-Free/Halogen-Free
Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP,
and 8-ball dBGA2 Packages
Description
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable pro-
grammable read-only memory (EEPROM), organized as 64/128/256 words of 16 bits
each (when the ORG pin is connected to VCC), and 128/256/512 words of 8 bits each
(when the ORG pin is tied to ground). The device is optimized for use in many indus-
trial and commercial applications where low-power and low-voltage operations are
essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP, 8-lead
JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, and 8-lead dBGA2
packages.
The AT93C46/56/66 is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
and no separate Erase cycle is required before Write. The Write cycle is only enabled
when the part is in the Erase/Write Enable state. When CS is brought high following
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C46/56/66 is available in 2.7V to 5.5V and 1.8V to 5.5V versions.
Table 1. Pin Configurations
Pin Name
Function
CS Chip Select
SK Serial Data Clock
DI Serial Data Input
DO Serial Data Output
GND
Ground
VCC
Power Supply
ORG
Internal Organization
DC Don’t Connect
8-lead SOIC
8-lead dBGA2
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
VCC
DC
ORG
GND
8
7
6
5
1 CS
2 SK
3 D1
4 D0
8-lead PDIP
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
8-lead SOIC
Rotated (R)
(1K JEDEC Only)
DC
VCC
CS
SK
1
2
3
4
8 ORG
7 GND
6 DO
5 DI
8-lead MAP
VCC 8
DC 7
ORG 6
GND 5
1 CS
2 SK
3 DI
4 DO
8-lead TSSOP
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
Three-wire
Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
AT93C46
AT93C56(1)
AT93C66(2)
Note: 1. This device is not recom-
mended for new designs.
Please refer to AT93C56A.
2. This device is not recom-
mended for new designs.
Please refer to AT93C66A.
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Absolute Maximum Ratings*
Operating Temperature......................................−55°C to +125°C
Storage Temperature .........................................−65°C to +150°C
Voltage on Any Pin
with Respect to Ground ........................................ −1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only, and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Figure 1. Block Diagram
Note:
When the ORG pin is connected to VCC, the “x 16” organization is selected. When it is
connected to ground, the “x 8” organization is selected. If the ORG pin is left uncon-
nected and the application does not load the input beyond the capability of the internal 1
Meg ohm pullup, then the “x 16” organization is selected. The feature is not available on
the 1.8V devices.
For the AT93C46, if “x 16” organization is the mode of choice and Pin 6 (ORG) is left
unconnected, Atmel recommends using the AT93C46A device. For more details, see the
AT93C46A datasheet.
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AT93C46/56/66
Table 2. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted)
Symbol Test Conditions
Max
Units
Conditions
COUT
CIN
Note:
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
1. This parameter is characterized and is not 100% tested.
5 pF VOUT = 0V
5 pF VIN = 0V
Table 3. DC Characteristics
Applicable over recommended operating range from: TAI = 40°C to +85°C, VCC = +1.8V to +5.5V,
TAE = -40°C to +125°C, VCC = +1.8V to +5.5V (unless otherwise noted)
Symbol Parameter
Test Condition
Min Typ
Max
VCC1
Supply Voltage
1.8 5.5
VCC2
Supply Voltage
2.7 5.5
VCC3
Supply Voltage
4.5 5.5
READ at 1.0 MHz
ICC
Supply Current
VCC = 5.0V
WRITE at 1.0 MHz
0.5 2.0
0.5 2.0
ISB1
Standby Current
VCC = 1.8V
CS = 0V
ISB2
Standby Current
VCC = 2.7V
CS = 0V
ISB3
Standby Current
VCC = 5.0V
CS = 0V
IIL
Input Leakage
VIN = 0V to VCC
IOL
Output Leakage
VIN = 0V to VCC
VIL1(1)
VIH1(1)
Input Low Voltage
Input High Voltage
2.7V VCC 5.5V
VIL2(1)
VIH2(1)
Input Low Voltage
Input High Voltage
1.8V VCC 2.7V
VOL1
VOH1
Output Low Voltage
Output High Voltage
2.7V VCC 5.5V
IOL = 2.1 mA
IOH = 0.4 mA
VOL2
VOH2
Note:
Output Low Voltage
Output High Voltage
1.8V VCC 2.7V
IOL = 0.15 mA
IOH = 100 µA
1. VIL min and VIH max are reference only and are not tested.
0 0.1
6.0 10.0
17 30
0.1 1.0
0.1 1.0
0.6
0.8
2.0
0.6
VCC x 0.7
VCC + 1
VCC x 0.3
VCC + 1
0.4
2.4
0.2
VCC – 0.2
Unit
V
V
V
mA
mA
µA
µA
µA
µA
µA
V
V
V
V
V
V
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Table 4. AC Characteristics
Applicable over recommended operating range from TAI = 40°C to + 85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted)
Symbol
Parameter
Test Condition
Min Typ
fSK
SK Clock
Frequency
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
0
0
0
4.5V VCC 5.5V
tSKH
SK High Time
2.7V VCC 5.5V
1.8V VCC 5.5V
250
250
1000
4.5V VCC 5.5V
tSKL
SK Low Time
2.7V VCC 5.5V
1.8V VCC 5.5V
250
250
1000
tCS
Minimum CS
Low Time
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
250
250
1000
4.5V VCC 5.5V
50
tCSS
CS Setup Time Relative to SK
2.7V VCC 5.5V
50
1.8V VCC 5.5V
200
4.5V VCC 5.5V
100
tDIS
DI Setup Time
Relative to SK
2.7V VCC 5.5V
100
1.8V VCC 5.5V
400
tCSH
CS Hold Time
Relative to SK
0
4.5V VCC 5.5V
100
tDIH
DI Hold Time
Relative to SK
2.7V VCC 5.5V
100
1.8V VCC 5.5V
400
tPD1
Output Delay to
“1”
AC Test
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
tPD0
Output Delay to
“0”
AC Test
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
tSV
CS to Status
Valid
AC Test
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
tDF
CS to DO in High AC Test
Impedance
CS = VIL
4.5V VCC 5.5V
2.7V VCC 5.5V
1.8V VCC 5.5V
tWP
Endurance(1)
Write Cycle Time
5.0V, 25°C
4.5V VCC 5.5V
Note: 1. This parameter is characterized and is not 100% tested.
0.1
1M
3
Max
2
1
0.25
250
250
1000
250
250
1000
250
250
1000
100
100
400
10
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
Write Cycles
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AT93C46/56/66
Table 5. Instruction Set for the AT93C46
Instruction SB
Op
Code
Address
x 8 x 16
READ
1 10
A6 – A0
A5 – A0
EWEN
ERASE
WRITE
ERAL
1 00 11XXXXX 11XXXX
1 11
1 01
A6 – A0
A6 – A0
A5 – A0
A5 – A0
1 00 10XXXXX 10XXXX
Data
x 8 x 16
D7 – D0
D15 – D0
WRAL
1 00 01XXXXX 01XXXX D7 – D0 D15 – D0
EWDS
1 00 00XXXXX 00XXXX
Note: The Xs in the address field represent DON’T CARE values and must be clocked.
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erases memory location An – A0
Writes memory location An – A0
Erases all memory locations. Valid
only at VCC = 4.5V to 5.5V
Writes all memory locations. Valid
only at VCC = 4.5V to 5.5V
Disables all programming instructions
Table 6. Instruction Set for the AT93C56(1) and AT93C66(2)
Op
Instruction SB Code
Address
x 8 x 16
READ
1 10
A8 – A0
A7 – A0
Data
x 8 x 16
EWEN
ERASE
WRITE
ERAL
1 00 11XXXXXXX 11XXXXXX
1 11
1 01
A8 – A0
A8 – A0
A7 – A0
A7 – A0
D7 – D0
D15 – D0
1 00 10XXXXXXX 10XXXXXX
WRAL
1 00 01XXXXXXX 01XXXXXX D7 – D0 D15 – D0
EWDS
1 00 00XXXXXXX 00XXXXXX
Notes: 1. This device is not recommended for new designs. Please refer to AT93C56A.
2. This device is not recommended for new designs. Please refer to AT93C66A.
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erases memory location An – A0
Writes memory location An– A0
Erases all memory locations. Valid
only at VCC = 4.5V to 5.5V
Writes all memory locations. Valid
only at VCC = 5.0V ±10% and Disable
Register cleared
Disables all programming instructions
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