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PS21PS22015205
TRATNRSAFNESRF-EMRO-MLDOLTDYPTEYPE
INSIUNLSAUTLEADTETDYPTEYPE
PS21205
INTEGRATED POWER FUNCTIONS
600V/20A low-loss 3rd generation IGBT inverter bridge for 3
phase DC-to-AC power conversion (Fig. 2)
Application Motor Ratings : Power : 1.5kW, sinusoidal, PWM
Frequency=5kHz
100% load current : 8.0A (rms)*
150% load current : 12.0A (rms)*,
1 minute.
*(Note) : The motor current is assumed to be sinusoidal and
the peak current value is defined as : lO ! 2
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS
• For upper-leg IGBTS : Drive circuit, High voltage isolated high-speed level shifting, Control circuit under-voltage (UV) protection.
Note : Bootstrap supply scheme can be applied (Fig. 2).
• For lower-leg IGBTS : Drive circuit, Control curcuit under-voltage protection (UV), Short circuit protection (SC). (Fig. 3)
• Fault signaling : Corresponding to a SC fault (Low-side IGBT) or a UV fault (Low-side supply).
• Input interface : 5V line CMOS/TTL compatible, Schmitt Trigger receiver circuit.
APPLICATION
AC100V~200V three-phase inverter drive for small power (1.5 kW) motor control.
Fig. 1 PACKAGE OUTLINES
2.8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
2-φ4.5
22 23 24 25
10 10 10
67
79
26
20
3.8
TERMINALS CODE
1. UP
4. VUFS
2. VP1 5. VP
3. VUFB 6. VP1
7. VVFB
8. VVFS
9. WP
10. VP1 13. VWFS 16. CIN 19. UN
11. VPC 14. VN1 17. CFO 20. VN
12. VWFB 15. VNC 18. Fo 21. WN
22. P
23. U
24. V
25. W
26. N
Aug. 1999

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MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21205
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 2 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
C3 : Tight tolerance, temp-compensated electrolytic type
(Note : The capacitance value depends on the PWM control
scheme used in the applied system).
C4 : 0.22~2µF R-category ceramic capacitor for noise filtering.
Inrush current
limiter circuit
High-side input (PWM)
(5V line) Note 1,2)
Input signal Input signal Input signal
coditioning coditioning coditioning
Level shifter Level shifter Level shifter
Protection
circuit (UV)
Protection
circuit (UV)
Protection
circuit (UV)
Drive circuit Drive circuit Drive circuit
P
Bootstrap circuit
For detailed description
C4 of the boot-strap circuit
C3 construction, please
contact Mitsubishi
Electric
(Note 6)
DIP-IPM
AC line input
C
Z
(Note 4)
Fig. 3
N1
VNC
N
CIN
H-side IGBTS U
V
W
M
AC line output
L-side IGBTS
Z : ZNR (Surge absorber)
C : AC filter (Ceramic capacitor 2.2~6.5nF)
(Note : Additionally, an appropriate line-to line
surge absorber circuit may become necessary
depending on the application environment).
Input signal conditioning
Fo logic
Drive circuit
Protection
circuit
Control supply
Under-Voltage
protection
Note1:
2:
3:
4:
5:
6:
Low-side input (PWM)
FO CFO
(5V line) (Note 1, 2) Fault output (5V line)
(Note 3, 5)
VNC
VD
To prevent the input signals oscillation, an RC coupling at each input is recommended. (see also Fig. 7)
(15V line)
By virtue of integrating an application specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler or transformer
isolation is possible. (see also Fig. 7)
This output is open collector type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 5.1kresistance.
(see also Fig. 7)
The wiring between the power DC link capacitor and the P/N1 terminals should be as short as possible to protect the DIP-IPM against catastrophic high
surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to
these P and N1 DC power input pins.
Fo output pulse width should be decided by putting external capacitor between CFO and VNC terminals. (Example : CFO=22nF tFO=1.8ms (Typ.))
High voltage diodes (600V or more) should be used in the bootstrap circuit.
Fig. 3 EXTERNAL PART OF THE DIP-IPM PROTECTION CIRCUIT
DIP-IPM
P
Drive circuit
External protection circuit
H-side IGBTS
L-side IGBTS
Short Circuit Protective Function (SC) :
SC protection is achieved by sensing the L-side DC-Bus current (through the external
shunt resistor) after allowing a suitable filtering time (defined by the RC circuit).
When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned
OFF and a fault signal (Fo) is output. Since the SC fault may be repetitive, it is
recommended to stop the system when the Fo signal is received and check the fault.
IC (A)
SC Protection
U Trip Level
V
W
N1
Shunt Resistor
AN
CR
C
VNC
CIN
B
Drive circuit
Protection circuit
Note1: In the recommended external protection circuit, please select the RC time constant in the range 1.5~2.0µs.
2: To prevent erroneous protection operation, the wiring of A, B, C should be as short as possible.
0
Collector current
waveform
2 tw (µs)
Aug. 1999

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MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21205
TRANSFER-MOLD TYPE
INSULATED TYPE
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
Parameter
Condition
Ratings
Unit
VCC Supply voltage
VCC(surge) Supply voltage (surge)
Applied between P-N
Applied between P-N
450 V
500 V
VCES
±IC
±ICP
PC
Tj
Collector-emitter voltage
Each IGBT collector current
Each IGBT collector current (peak)
Collector dissipation
Junction temperature
TC = 25°C
TC = 25°C, instantaneous value (pulse)
TC = 25°C, per 1 chip
(Note 1)
600
20
40
56
–20~+150
V
A
A
W
°C
Note 1 : The maximum junction temperature rating of the power chips integrated within the DIP-IPM is 150°C (@ TC 100°C) however, to in-
sure safe operation of the DIP-IPM, the average junction temperature should be limited to Tj(ave) 125°C (@ TC 100°C).
CONTROL (PROTECTION) PART
Symbol
VD
VDB
Parameter
Control supply voltage
Control supply voltage
VCIN
VFO
IFO
VSC
Input voltage
Fault output supply voltage
Fault output current
Current sensing input voltage
Condition
Applied between VP1-VPC, VN1-VNC
Applied between VUFB-VUFS, VVFB-VVFS,
VWFB-VWFS
Applied between UP, VP, WP-VPC, UN, VN,
WN-VNC
Applied between FO-VNC
Sink current at FO terminal
Applied between CIN-VNC
Ratings
20
20
–0.5~+5.5
–0.5~VD+0.5
15
–0.5~VD+0.5
Unit
V
V
V
V
mA
V
TOTAL SYSTEM
Symbol
Parameter
VCC(PROT) Self protection supply voltage limit
(short circuit protection capability)
TC Module case operation temperature
Tstg Storage temperature
Viso Isolation voltage
Condition
VD = VDB = 13.5~16.5V, Inverter part
Tj = 125°C, non-repetitive, less than 2 µs
(Note 2)
60Hz, Sinusoidal, AC 1 minute, connection
pins to heat-sink plate
Ratings
400
–20~+100
–40~+125
1500
Unit
V
°C
°C
Vrms
Note 2 : TC MEASUREMENT POINT
Control pins
Heat sink boundary
DIP-IPM
Tc
Power pins
Aug. 1999