NTE857M.pdf 데이터시트 (총 3 페이지) - 파일 다운로드 NTE857M 데이타시트 다운로드

No Preview Available !

NTE857M
NTE857SM
Integrated Circuit
Low–Noise JFET–Input Operational Amplifier
Description:
The NTE857M and NTE857SM are low–noise JFET input operational amplifiers combining two
state–of–the–art linear technologies on a single monolithic integrated circuit. Each internally com-
pensated operational amplifier has well matched high voltage JFET input devices for low input offset
voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias cur-
rents, input offset currents, and supply currents. Moreover, these devices exhibit low–noise and low
harmonic distortion making them ideal for use in high–fidelity audio amplifier applications.
Features:
D Available in Two Different Package Types:
8–Lead Mini DIP (NTE857M)
SOIC–8 Surface Mount (NTE857SM)
D Low Input Noise Voltage: 18nVHz Typ
D Low Harmonic Distortion: 0.01% Typ
D Low Input Bias and Offset Currents
D High Input Impedance: 1012Typ
D High Slew Rate: 13V/µs Typ
D Wide Gain Bandwidth: 4MHz Typ
D Low Supply Current: 1.4mA per Amp
Absolute Maximum Ratings:
Supply Voltage
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V
VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18V
Differential Input Voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
Input Voltage Range (Note 1), VIDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
Output Short–Circuit Duration (Note 2), tS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 680mW
Derate Above TA = +47°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mW/°C
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Note 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or
15V, whichever is less.
Note 2. The output may be shorted to GND or either supply. Temperature and/or supply voltages
must be limited to ensure that power dissipation ratungs are not exceeded.

No Preview Available !

Electrical Characteristics: (VCC = +15V, VEE = 15V, TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Input Offset Voltage
Average Temperature
Coefficient of Input Offset
Voltage
VIO RS 10k,
VCM = 0
TA = 0 to +70°C
VIO/T TA = 0 to +70°C
3 10 mV
13 mV
10 µV/°C
Input Offset Current
Input Bias Current
Input Resistance
Common Mode Input Voltage
Range
IIO VCM = 0,
Note 3
IIB VCM = 0,
Note 3
ri
VICR
TA = 0 to +70°C
TA = 0 to +70°C
5 50
––2
30 200
––7
1012
±10 +15, 12
pA
nA
pA
nA
V
LargeSignal Voltage Gain
AVOL VO = ±10V,
RL 2k
TA = 0 to +70°C
25
15
150
V/mV
V/mV
Output Voltage Swing
(PeaktoPeak)
VO RL = 10k
24 28 V
RL 10k TA = 0 to +70°C 24
V
RL 2k
20
V
Common Mode Rejection Ratio CMRR RS 10k
70 100 dB
Supply Voltage Rejection Ratio PSRR RS 10k
70 100 dB
Supply Current (Each Amplifier) ID
1.4 2.5 mA
Unity Gain Bandwidth
BW
4 MHz
Slew Rate
SR VIN = 10V, RL = 2k, CL = 100pF 13 V/µs
Rise Time
tr
0.1 µs
Overshoot Factor
VIN = 20mV, RL = 2k,
CL = 100pF
10 %
Equivalent Input Noise Voltage
en RS = 100, f = 1000Hz
18 nV/Hz
Equivalent Input Noise Current
in RS = 100, f = 1000Hz
0.01 pA/Hz
Total Harmonic Distortion
THD VO(RMS) = 10V, RS 1k,
RL 2k, f = 1000Hz
0.01 %
Channel Separation
AV = 100
120 dB
Note 3. Input Bias currents of JFET input operational amplifiers approximately double for every 10°C
rise in Junction Temperature. To maintain Junction Temperature as close to Ambient Tem-
perature as possible, pulse techniques must be used during test.

No Preview Available !

Pin Connection Diagram
Offset Null 1
Inverting Input (1) 2
NonInverting Input (1) 3
VEE 4
8 N.C.
7 VCC
6 Output
5 Offset Null
NTE857M
85
.260 (6.6)
14
.390 (9.9)
Max
.155
(3.93)
.300
(7.62)
.100 (2.54)
.300 (7.62)
.145 (3.68)
NTE857SM
.192 (4.9)
8 5 .236
(5.99)
.154
(3.91)
14
.050 (1.27)
016
(.406)
061
(1.53)
.198 (5.03)
.006 (.152)
NOTE: Pin1 on Beveled Edge