NTE861.pdf 데이터시트 (총 3 페이지) - 파일 다운로드 NTE861 데이타시트 다운로드

No Preview Available !

NTE861
Integrated Circuit
Quad, Normally Open, SPST JFET
Analog Switch w/Disable
Description:
The NTE861 is a monolithic combination of bipolar and JFET technology producing a one chip quad
JFET switch. A unique circuit technique is employed to maintain a constant resistance over the ana-
log voltage range of ±10V. The input is designed to operate from minimum TTL levels, and switch
operation also ensures a break–before–make action.
Features:
D Analog signals are not loaded
D Constant “ON” resistance for signals up to ±10V and 100kHz
D Pin compatible with CMOS switches with the advantage of blow out free handling
D Small signal analog signals to 50MHz
D Break–before–make action
D High open switch isolation at 1.0MHz
D Low leakage in “OFF” state
D TTL, DTL, RTL compatibility
D Single disable pin opens all switches in package
This device operates from a ±15V supply and swings a ±10V analog signal. The JFET switches are
designed for applications where a dc to medium frequency analog signal needs to be controlled.
Absolute Maximum Ratings:
Positive Supply–Negative Supply (VCC –VEE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE VR VCC
Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VR –4.0V VIN VR +6.0V
Analog Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE VA VCC +6V; VA VEE +36V
Analog Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IA < 20mA
Power Dissipation (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to 70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to 150°C
Typical Thermal Resistance, Junction–to–Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
Note 1 For operating at high temperature this device must be derated based on a +100°C maximum
junction temperature and a thermal resistance of +150°C/W.

No Preview Available !

Electrical Characteristics: (Note 2)
Parameter
ONResistance
ONResistance Matching
Analog Range
Leakage Current in ONCondition
Source Current in OFFCondition
Drain Current in OFFCondition
Logical 1Input Voltage
Logical 0Input Voltage
Logical 1Input Current
Logical 0Input Current
Delay Time ON
Delay Time OFF
BreakBeforeMake
Source Capacitance
Drain Capacitance
Active Source and Drain
Capacitance
OFFIsolation
Crosstalk
Analog Slew Rate
Disable Current
Negative Supply Current
Reference Supply Current
Positive Supply Current
Symbol
Test Conditions
Min Typ Max Unit
RON VA = 0, ID = 1mA
TA = +25°C 150 250
200 350
RON Match
VA
IS(ON) +
ID(ON) +
TA = +25°C
Switch ON,
VS = VD = ±10V
10
±10 ±11
TA = +25°C 0.3
3
50
10
30
V
nA
nA
IS(OFF)
Switch OFF,
VS = +10V, VD = 10V
TA = +25°C
0.4 10 nA
3 30 nA
ID(OFF)
TA = +25°C
0.1 10 nA
3 30 nA
VINH
VINL
IINH
VIN = 5V
2.0 – – V
– – 0.8 V
TA = +25°C
3.6 40 µA
100 µA
IINL VIN = 0.8V
TA = +25°C
0.1 µA
1.0 µA
tON VS = ±10V, TA = +25°C
500 ns
tOFF VS = ±10V, TA = +25°C
90 ns
tON tOFF VS = ±10V, TA = +25°C
80 ns
CS(OFF) Switch OFF, VS = ±10V, TA = +25°C
4.0 pF
CD(OFF) Switch OFF, VD = ±10V, TA = +25°C
3.0 pF
CS(ON) + Switch ON, VS = VD = ±10V,
CD(ON) + TA = +25°C
5.0 pF
ISO(OFF) TA = +25°C, Note 3
– –50 dB
CT TA = +25°C, Note 3
– –65 dB
SR TA = +25°C, Note 4
50 V/µs
IDIS Note 5
TA = +25°C 0.6 1.5 mA
0.9 2.3 mA
IEE All Switches OFF,
VS = ±10V
TA = +25°C
4.3 7.0 mA
6.0 10.5 mA
IR TA = +25°C 2.7 5.0 mA
3.8 7.5 mA
ICC TA = +25°C 7.0 9.0 mA
9.8 13.5 mA
Note 2. VCC = +15V, VEE = 15V, VR = 0V, and limits apply for 25°C TA +85°C unless otherwise
specified.
Note 3. These parameters are limited by the pin to pin capacitance of the package.
Note 4. This is the analog signal slew rate above which the signal is distorted as a result of finite internal
slew rates.
Note 5. All switches in the device are turned OFFby saturating a transistor at the disable node.
The delay times will be approximately equal to the tON or tOFF plus the delay introduced by
the external transistor.

No Preview Available !

Pin Connection Diagram
Input 1 1
D1 2
S1 3
VR 4
() VEE 5
S2 6
D2 7
Input 2 8
16 Input 4
15 D 4
14 S 4
13 Disable
12 (+) VCC
11 S 3
10 D 3
9 Input 3
16 9
18
.870 (22.0) Max
.200 (5.08)
Max
.260 (6.6)
Max
.100 (2.54)
.700 (17.78)
.099 (2.5) Min