STH15NA50.pdf 데이터시트 (총 11 페이지) - 파일 다운로드 STH15NA50 데이타시트 다운로드

No Preview Available !

STH15NA50/FI
STW15NA50
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
TYPE
STH15NA50
STH15NA50FI
STW15NA50
VDSS
500 V
500 V
500 V
R DS( on)
< 0.4
< 0.4
< 0.4
ID
14.6 A
9.3 A
14.6 A
s TYPICAL RDS(on) = 0.33
s ± 30V GATE TO SOURCE VOLTAGE RATING
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100oC
s LOW INTRINSIC CAPACITANCES
s GATE GHARGE MINIMIZED
s REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The op-
timized cell layout coupled with a new proprietary
edge termination concur to give the device low
RDS(on) and gate charge, unequalled ruggedness
and superior switching performance.
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-source Voltage (VGS = 0)
VDG R Drain- gate Voltage (RGS = 20 k)
VGS Gate-source Voltage
ID Drain Current (continuous) at T c = 25 oC
ID Drain Current (continuous) at T c = 100 oC
IDM() Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 oC
Derating Factor
VISO Insulation Withstand Voltage (DC)
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
() Pulse width limited by safe operating area
November 1996
TO-247
3
2
1
TO-218
33
22
1
1
ISOWATT218
INTERNAL SCHEMATIC DIAGRAM
Val ue
STH/STW15NA50 STH15NA50FI
500
500
± 30
14.6
9.3
9.2 5.5
58.4
58.4
190 80
1. 52
0. 64
4000
-65 to 150
150
Unit
V
V
V
A
A
A
W
W/oC
V
oC
oC
1/11

No Preview Available !

STH15NA50/FI - STW15NA50
THERMAL DATA
Rthj-case
Rthj- amb
Rt hc- sin k
Tl
TO-218/TO-247 ISOWATT218
Thermal Resistance Junction-case
Max 0.66
1.56
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
30
0.1
300
oC/W
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symb ol
IA R
EAS
EAR
IA R
Pa ra met er
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max, δ < 1%)
Single Pulse Avalanche Energy
(st arting Tj = 25 oC, ID = IAR, VD D = 50 V)
Repetitive Avalanche Energy
(pulse width limited by Tj max, δ < 1%)
Avalanche Current, Repetitive or Not-Repetitive
(Tc = 100 oC, pulse width limited by Tj max, δ < 1%)
Max Value
14.6
850
30
9.2
Unit
A
mJ
mJ
A
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symb ol
Parameter
Test Conditions
V(BR)DSS Drain-source
Breakdown Voltage
ID = 250 µA VG S = 0
IDSS
Zero Gate Voltage
VDS = Max Rating
Drain Current (VGS = 0) VDS = Max Rating x 0.8 Tc = 125 oC
IG SS
Gate-body Leakage
Current (VD S = 0)
VGS = ± 30 V
Min.
500
Typ.
Max.
Unit
V
25
250
± 100
µA
µA
nA
ON ()
Symb ol
VG S(th)
RDS(on)
ID(on)
Parameter
Test Conditions
Gate Threshold Voltage VDS = VGS ID = 250 µA
Static Drain-source On VGS = 10V ID = 7.5 A
R esist anc e
On St ate Drain Current VDS > ID( on) x RD S(on) max
VGS = 10 V
Min.
2. 25
Typ.
3
0. 33
Max.
3. 75
0.4
Unit
V
14.6
A
DYNAMIC
Symb ol
gfs ()
Ciss
Coss
Crss
Parameter
Forward
Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
VDS > ID( on) x RD S(on) max ID = 7. 5 A
Min.
9
Typ.
13
Max.
Unit
S
VDS = 25 V f = 1 MHz VG S = 0
2500
345
105
3250
450
140
pF
pF
pF
2/11

No Preview Available !

STH15NA50/FI - STW15NA50
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symb ol
td(on)
tr
(di/ d t) o n
Qg
Qgs
Qgd
Parameter
Turn-on Time
Rise Time
Turn-on Current Slope
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
VDD = 225 V ID = 7.5 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 3)
VDD = 400 V ID = 15 A
RG = 47
VGS = 10 V
(see test circuit, figure 5)
VDD = 400 V ID = 15 A VG S = 10 V
Min.
Typ.
24
37
225
110
15
55
Max.
34
50
140
Unit
ns
ns
A/µs
nC
nC
nC
SWITCHING OFF
Symb ol
tr(Vof f)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 400 V ID = 15 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 5)
Min.
Typ.
25
17
45
Max.
35
24
60
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Conditions
IS D
I SDM()
Source-drain Current
Source-drain Current
(pulsed)
VSD () Forward On Voltage
ISD = 15 A VGS = 0
trr Reverse Recovery
Time
Qrr Reverse Recovery
Charge
ISD = 15 A
di/dt = 100 A/µs
VDD = 100 V Tj = 150 oC
(see test circuit, figure 5)
IRRM Reverse Recovery
Current
() Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
() Pulse width limited by safe operating area
Min.
Typ.
Max.
14.6
58.4
Unit
A
A
640
12.8
40
1.6
V
ns
µC
A
Safe Operating Areas For TO-218 and TO-247
Safe Operating Areas For ISOWATT218
3/11

No Preview Available !

STH15NA50/FI - STW15NA50
Thermal Impedeance For TO-218 and TO-247
Thermal Impedance For ISOWATT218
Derating Curve For TO-218 and TO-247
Derating Curve For ISOWATT218
Output Characteristics
Transfer Characteristics
4/11

No Preview Available !

Transconductance
STH15NA50/FI - STW15NA50
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
5/11