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March 1986
DS1649 DS3649 DS1679 DS3679 Hex TRI-STATE TTL
to MOS Drivers
General Description
The DS1649 DS3649 and DS1679 DS3679 are Hex
TRI-STATE MOS drivers with outputs designed to drive
large capacitive loads up to 500 pF associated with MOS
memory systems PNP input transistors are employed to re-
duce input currents allowing the large fan-out to these driv-
ers needed in memory systems The circuit has Schottky-
clamped transistor logic for minimum propagation delay
and TRI-STATE outputs for bus operation
The DS1649 DS3649 has a 15X resistor in series with the
outputs to dampen transients caused by the fast-switching
TRI-STATE is a registered trademark of National Semiconductor Corp
output The DS1679 DS3679 has a direct low impedance
output for use with or without an external resistor
Features
Y High speed capabilities
 Typ 9 ns driving 50 pF
 Typ 30 ns driving 500 pF
Y TRI-STATE outputs for data bussing
Y Built-in 15X damping resistor (DS1649 DS3649)
Y Same pin-out as DM8096 and DM74366
Schematic Diagram
Truth Table
Disable Input
Input Output
DIS 1 DIS 2
0
00
1
0
01
0
0 1 X Hi-Z
1 0 X Hi-Z
1 1 X Hi-Z
X e Don’t care
Hi-Z e TRI-STATE mode
DS1649 DS3649 only
Connection Diagram
Dual-In-Line Package
TL F 7515 – 1
Typical Application
Top View
TL F 7515 – 2
Order Number DS1649J DS3649J
DS1679J DS3679J DS3649N or DS3679N
See NS Package Number J16A or N16A
C1995 National Semiconductor Corporation TL F 7515
TL F 7515 – 3
RRD-B30M105 Printed in U S A

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Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7 0V
Logical ‘‘1’’ Input Voltage
7 0V
Logical ‘‘0’’ Input Voltage
b1 5V
Storage Temperature Range
b65 C to a150 C
Maximum Power Dissipation at 25 C
Cavity Package
Molded Package
1371 mW
1280 mW
Lead Temperature (Soldering 10 sec )
300 C
Operating Conditions
Min Max Units
Supply Voltage (VCC
Temperature (TA)
DS1649 DS1679
45
b55
55
a125
V
C
DS3649 DS3679
0 a70
C
Derate cavity package 9 1 mW C above 25 C derate molded package
10 2 mW C above 25 C
Electrical Characteristics (Note 2 and 3)
Symbol
Parameter
Conditions
VIN(1)
VIN(0)
IIN(1)
IIN(0)
VCLAMP
VOH
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
Input Clamp Voltage
Logical ‘‘1’’ Output Voltage
(No Load)
VCC e 5 5V VIN e 5 5V
VCC e 5 5V VIN e 0 5V
VCC e 4 5V IIN e b18 mA
VCC e 4 5V IOH e b10 mA
DS1649 DS1679
DS3649 DS3679
VOL Logical ‘‘0’’ Output Voltage VCC e 4 5V IOL e 10 mA
(No Load)
DS1649 DS1679
DS3649 DS3679
VOH
Logical ‘‘1’’ Output Voltage VCC e 4 5V IOH e b1 0 mA
(With Load)
DS1649
DS1679
DS3649
DS3679
VOL Logical ‘‘0’’ Output Voltage VCC e 4 5V IOL e 20 mA
(With Load)
DS1649
DS1679
DS3649
DS3679
I1D Logical ‘‘1’’ Drive Current VCC e 4 5V VOUT e 0V (Note 4)
I0D Logical ‘‘0’’ Drive Current VCC e 4 5V VOUT e 4 5V (Note 4)
Hi-Z TRI-STATE Output Current VOUT e 0 4V to 2 4V DIS1 or DIS2 e 2 0V
ICC Power Supply Current VCC e 5 5V One DIS Input e 3 0V
All Other Inputs e X
All Inputs e 0V
Min
20
27
28
24
25
26
27
b40
Typ
01
b50
b0 75
36
36
0 25
0 25
35
35
35
35
06
04
06
04
b250
150
42
11
Max
08
40
b250
b1 2
04
0 35
11
05
10
05
40
75
20
Units
V
V
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
2

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Switching Characteristics (VCC e 5V TA e 25 C) (Note 4)
Symbol
Parameter
Conditions
Min Typ Max Units
tSg Storage Delay Negative Edge
(Figure 1 )
CL e 50 pF
45 7
ns
CL e 500 pF
7 5 12
ns
tSg Storage Delay Positive Edge
(Figure 1 )
CL e 50 pF
5 8 ns
CL e 500 pF
8 13 ns
tF Fall Time
(Figure 1 )
CL e 50 pF
5 8 ns
CL e 500 pF
22 35
ns
tR Rise Time
(Figure 1 )
CL e 50 pF
6 9 ns
CL e 500 pF
21 35
ns
tZL Delay from Disable Input to Logical ‘‘0’’ CL e 50 pF
Level (from High Impedance State)
RL e 2 kX to VCC (Figure 2 )
10 15
ns
tZH Delay from Disable Input to Logical ‘‘1’’ CL e 50 pF
Level (from High Impedance State)
RL e 2 kX to GND (Figure 2 )
8 15 ns
tLZ Delay from Disable Input to High Impedance CL e 50 pF
State (from Logical ‘‘0’’ Level)
RL e 400X to VCC (Figure 3 )
15 25
ns
tHZ Delay from Disable Input to High Impedance CL e 50 pF
State (from Logical ‘‘1’’ Level)
RL e 400X to GND (Figure 3 )
10 25
ns
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 Unless otherwise specified min max limits apply across the b55 C to a125 C temperature range for the DS1649 and DS1679 and across the 0 C to
a70 C range for the DS3649 and DS3679 All typical values are for TA e 25 C and VCC e 5V
Note 3 All currents into device pins shown as positive out of device pins as negative all voltages referenced to ground unless otherwise noted All values shown
as max or min on absolute value basis
Note 4 When measuring output drive current and switching response for the DS1679 and DS3679 a 15X resistor should be placed in series with each output This
resistor is internal to the DS1649 DS3649 and need not be added
AC Test Circuits and Switching Time Waveforms
tSg tStR tF
TL F 7515 – 4
FIGURE 1
TL F 7515 – 5
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AC Test Circuits and Switching Time Waveforms (Continued)
tZH tZL
TL F 7515 – 6
TL F 7515 – 7
FIGURE 2
TL F 7515 – 8
tHZ tLZ
TL F 7515 – 9
TL F 7515 – 10
Internal on DS1649 and DS3649
FIGURE 3
TL F 7515 – 11
Note 1 The pulse generator has the following characteristics ZOUT e 50X and PRR s 1 MHz Rise and fall times between 10% and 90% points s 5 ns
Note 2 CL includes probe and jig capacitance
4

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Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number DS1649J DS3649J
DS1679J or DS3679J
NS Package Number J16A
5