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®
Data Sheet
ISL6410, ISL6410A
September 17, 2004
FN9149.3
Single Synchronous Buck Regulators
with Integrated FET
The ISL6410, ISL6410A are synchronous current-mode
PWM regulators designed to provide a total DC-DC solution
for microcontrollers, microprocessors, CPLDs, FPGAs, core
processors/BBP/MAC, and ASICs. The ISL6410 should be
selected for applications using 3.3V ±10% as an input
voltage and the ISL6410A in applications requiring 5.0V
±10%.
These synchronous current mode PWM regulators have
integrated N- and P-Channel power MOSFETs and provide
pre-set pin programmable outputs. Synchronous rectification
with internal MOSFETs is used to achieve higher efficiency
and a reduced external component count. The operating
frequency of 750kHz typical allows the use of small inductor
and capacitor values. The device can be synchronized to an
external clock signal in the range of 500kHz to 1MHz. A
power good signal “PG” is generated when the output
voltage falls outside the regulation limits. Other features
include overcurrent protection and thermal overload
shutdown. The ISL6410, ISL6410A are available in an
MSOP 10 lead package.
Ordering Information
TEMP.
PART NUMBER* RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL6410IR
-40 to 85 16 Ld 4x4 QFN
L16.4x4
ISL6410IRZ (Note)
-40 to 85 16 Ld 4x4 QFN
(Pb-free)
L16.4x4
ISL6410IU
-40 to 85 10 Ld MSOP
M10.118
ISL6410IUZ (Note) -40 to 85 10 Ld MSOP (Pb-free) M10.118
ISL6410AIR
-40 to 85 16 Ld 4x4 QFN
L16.4x4
ISL6410AIRZ (Note) -40 to 85 16 Ld 4x4 QFN
(Pb-free)
L16.4x4
ISL6410AIU
-40 to 85 10 Ld MSOP
M10.118
ISL6410AIUZ (Note) -40 to 85 10 Ld MSOP (Pb-free) M10.118
*For tape and reel, add “-T”, “-TK” or “-T5K” suffix.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
Features
• Fully Integrated Synchronous Buck Regulator
• PWM Fixed Output Voltage Options
- 1.8V, 1.5V or 1.2V with ISL6410 (VIN = 3.3V)
- 3.3V, 1.8V or 1.2V with ISL6410A (VIN = 5.0V)
• Continuous Output Current . . . . . . . . . . . . . . . . . . 600mA
• Ultra-Compact DC-DC Converter Design
• Stable with Small Ceramic Output Capacitors
• High Conversion Efficiency
• Extensive Circuit Protection and Monitoring features
- Overvoltage, UVLO
- Overcurrent
- Thermal Shutdown
• Available in MSOP and QFN packages
• QFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• Pb-Free Packaging Available
Applications
• CPUs, DSP, CPLDs, FPGAs
• ASICs
• DVD and DSL applications
• WLAN Cards
• Generic 5V to 3.3V Conversion
Pinouts
ISL6410 (MSOP)
TOP VIEW
ISL6410 (QFN)
TOP VIEW
PVCC 1
VIN 2
GND 3
PG 4
FB 5
10 PGND
9L
16 15 14 13
8 EN
VIN 1
12 NC
7 SYNC
CT 2
6 VSET GND 3
11 RESET
10 EN
PG 4
9 SYNC
56 7 8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Functional Block Diagram for MSOP Version
VIN
10µF
2 VIN
3 GND
7 SYNC
6 VSET
8 EN
SOFT
START
SLOPE
COMPENSATION
EA GM
EN PWM
OVERCURRENT,
OVERVOLTAGE
LOGIC
COMPENSATION
750kHz
OSCILLATOR
POWER GOOD
PWM
VOUT
UVLO
PWM
REFERENCE
0.45V
4 PG
CURRENT
SENSE
GATE
DRIVE
PVCC 1
0.1µF
L1
8.2µH
L9
VOUT
10µF
PGND 10
FB 5
NOTES:
1. VIN is 3.3V for ISL6410 and 5.0V for ISL6410A.
2. VSET in the above schematic is connected to VIN, so the VOUT is 1.8V for ISL6410 and 3.3V for ISL6410A.

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Functional Block Diagram for QFN Version
VIN
10µF
16 VIN
3 GND
9 SYNC
7 VSET
10 EN
SOFT
START
SLOPE
COMPENSATION
EA GM
EN PWM
OVERCURRENT,
OVERVOLTAGE
LOGIC
COMPENSATION
CURRENT
SENSE
GATE
DRIVE
750kHz
OSCILLATOR
POWER GOOD
PWM
VOUT
UVLO
PWM
REFERENCE
0.45V
VIN
RESET
BLOCK
4 PG
8 PG
2 CT
PVCC 15
0.1µF
L1
8.2µH
L 14
VOUT
10µF
PGND 13
11
RESET
FB 5
NOTES:
1. VIN is 3.3V for ISL6410 and 5.0V for ISL6410A.
2. VSET in the above schematic is connected to VIN, so the VOUT is 1.8V for ISL6410 and 3.3V for ISL6410A.

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Typical Application Schematics
VIN
3.3V
±10%
CIN
10µF
ISL6410, ISL6410A
0.1µF
1 PVCC PGND 10
2 VIN
L9
ISL6410
3 GND
EN 8
4 PG
SYNC 7
5 FB
VSET 6
L1
8.2µH
COUT
10µF
VOUT
1.8V
FIGURE 1. SCHEMATIC USING THE ISL6410 MSOP
VIN
5.0V
±10%
CIN
10µF
0.1µF
1 PVCC PGND 10
2 VIN
L9
ISL6410A
3 GND
EN 8
4 PG
SYNC 7
5 FB
VSET 6
L1
12µH
COUT
10µF
VOUT
3.3V
+3.3V
VIN
GND
FIGURE 2. SCHEMATIC USING THE ISL6410A MSOP
CIN
10µF
1µF
C7
0.1µF
CT
0.01µF
16 15 14 13
1 VIN
2 CT
3 GND
4 PG
NC 12
U1 RESET
ISL6410IR EN
11
10
SYNC 9
17 EP
5 67 8
L1
8.2µH
COUT
10µF
+1.2V
VOUT
GND
RESET
BAR
FIGURE 3. SCHEMATIC USING THE ISL6410 QFN
4

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ISL6410, ISL6410A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
SYNC, FB, VSET & Enable Input (Note 3) . . . . -0.3V to VCC+0.3V
ESD Classification (Human Body Model) . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
MSOP Package (Note 4) . . . . . . . . . . . 128
NA
QFN Package (Notes 4, 5). . . . . . . . . .
45
7.5
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (10s, soldering . . . . . . . . . . . . . 260°C
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . -40°C to 85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . . . -40°C to 125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. All voltages are with respect to GND.
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended operating conditions unless otherwise noted. VIN = 3.3V ±10% (ISL6410) or 5V ±10%
(ISL6410A), TA = 25°C (Note 6).
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
VCC SUPPLY
Supply Voltage Range
VIN (ISL6410)
3.0 3.3 3.6
V
VIN (ISL6410A)
4.5 5.0 5.5
V
Input UVLO Threshold
Quiescent Supply Current
Shutdown Supply Current
Thermal Shutdown Temperature (Note 7)
VTR (ISL6410) Rising
VTF (ISL6410) Falling
VTR (ISL6410A) Rising
VTF (ISL6410A) Falling
IOUT = 0mA
EN = GND, TA = 25°C
EN = GND, TA = 85°C
Rising Threshold
2.62 2.68 2.73
2.53 2.59 2.64
4.27 4.37 4.45
4.1 4.22 4.32
- 2.3 -
- 5 10
- 10 15
- 150 -
V
V
V
V
mA
µA
µA
°C
Thermal Shutdown Hysteresis (Note 7)
- 20 25
°C
SYNCHRONOUS BUCK PWM REGULATOR
Output Voltage
ISL6410, VSET = L
- 1.2 -
V
ISL6410, VSET = H
- 1.8 -
V
ISL6410, VSET = OPEN
- 1.5 -
V
ISL6410A, VSET = L
- 1.2 -
V
ISL6410A, VSET = H
- 3.3 -
V
ISL6410A, VSET = OPEN
- 1.8 -
V
Output Voltage Accuracy
Line Regulation
Load Regulation
Maximum Output Current
IOUT = 3mA, TA = -40°C to 85°C
IOUT = 3mA
IOUT = 3mA to 600mA
-1.5 - +1.5
%
-0.5 - +0.5
%
-1.5 - +1.5
%
- - 600 mA
Peak Output Current Limit
700 - 1300 mA
PMOS rDS(ON)
NMOS rDS(ON)
Efficiency
IOUT = 200mA
- 230 -
IOUT = 200mA
- 230 -
IOUT = 200mA, VIN = 3.3V, VO = 1.8V (ISL6410)
-
92
-
m
m
%
5