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CAT24WCt43U2.c/o6m432K/64K-Bit I2C Serial CMOS EEPROM
heeFEATURES
taSI 400 KHz I2C bus compatible*
aI 1.8 to 5.5 volt read and write operation
.DI Cascadable for up to eight devices
wI 32/64-Byte page write buffer
wI Self-timed write cycle with auto-clear
w I 8-pin DIP or 8-pin SOIC
mI Schmitt trigger inputs for noise protection
.coDESCRIPTION
The CAT24WC32/64 is a 32K/64K-bit Serial CMOS
E2PROM internally organized as 4096/8192 words of 8
Ubits each. Catalyst’s advanced CMOS technology sub-
t4stantially reduces device power requirements. The
I Commercial, industrial, automotive and
extended automotive temperature ranges
I Write protection
– Entire array protected when WP at V
IH
I 1,000,000 Program/erase cycles
I 100 year data retention
CAT24WC32/64 features a 32-byte page write buffer.
The device operates via the I2C bus serial interface and
is available in 8-pin DIP or 8-pin SOIC packages.
ePIN CONFIGURATION
DIP Package (P, L, GL)
heA0
A1
SA2
VSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
ataSOIC Package (J, W, K, X, GW, GX)
.DA0
A1
A2
wVSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
BLOCK DIAGRAM
EXTERNAL LOAD
VCC
VSS
DOUT
ACK
WORD ADDRESS
BUFFERS
SDA
START/STOP
LOGIC
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
256
E2PROM
XDEC 128/256 128/256 X 256
CONTROL
WP LOGIC
wPIN FUNCTIONS
w omPin Name
Function
.cA0, A1, A2 Device Address Inputs
t4USDA
Serial Data/Address
eSCL Serial Clock
heWP Write Protect
SCL STATE COUNTERS
SVCC +1.8V to +5.5V Power Supply
ataVSS Ground
A0 SLAVE
A1 ADDRESS
A2 COMPARATORS
.D* Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol.
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
24WC32/64 F02
ww© 2005 by Catalyst Semiconductor, Inc.
wCharacteristics subject to change without notice
1
Doc. No. 1039, Rev. G

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CAT24WC32/64
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –55°C to +125°C
Storage Temperature ....................... –65°C to +150°C
Voltage on Any Pin with
Respect to Ground(1) ........... –2.0V to +VCC + 2.0V
VCC with Respect to Ground ............... –2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C) ................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current(2) ........................ 100mA
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
RELIABILITY CHARACTERISTICS
Symbol
Parameter
NEND(3)
TDR(3)
VZAP(3)
ILTH(3)(4)
Endurance
Data Retention
ESD Susceptibility
Latch-up
Min.
1,000,000
100
2000
100
Max.
Units
Cycles/Byte
Years
Volts
mA
D.C. OPERATING CHARACTERISTICS
VCC = +1.8V to +5.5V, unless otherwise specified.
Limits
Symbol Parameter
Min. Typ. Max.
ICC
ISB(5)
Power Supply Current
Standby Current (VCC = 5V)
3
1
ILI Input Leakage Current
10
ILO Output Leakage Current
10
VIL Input Low Voltage
–1 VCC x 0.3
VIH Input High Voltage
VCC x 0.7
VCC + 0.5
VOL1 Output Low Voltage (VCC = +3.0V)
0.4
VOL2 Output Low Voltage (VCC = +1.8V)
0.5
Units
mA
µA
µA
µA
V
V
V
V
Test Conditions
fSCL = 100 KHz
VIN = GND or VCC
VIN = GND to VCC
VOUT = GND to VCC
IOL = 3.0 mA
IOL = 1.5 mA
CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V
Symbol
Test
CI/O(3) Input/Output Capacitance (SDA)
CIN(3)
Input Capacitance (A0, A1, A2, SCL, WP)
Max.
8
6
Units
pF
pF
Conditions
VI/O = 0V
VIN = 0V
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V.
(5) Maximum standby current (ISB ) = 10µA for the Automotive and Extended Automotive temperature range.
Doc. No. 1039, Rev. G
2
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice

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CAT24WC32/64
A.C. CHARACTERISTICS
VCC = +1.8V to +5.5V, unless otherwise specified
Output Load is 1 TTL Gate and 100pF
Read & Write Cycle Limits
Symbol
FSCL
TI(1)
tAA
tBUF(1)
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR(1)
tF(1)
tSU:STO
tDH
Parameter
Clock Frequency
Noise Suppression Time Constant at
SCL, SDA Inputs
SCL Low to SDA Data Out and ACK
Out
Time the Bus Must be Free Before
a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
CAT24WCXX-1.8
1.8V-5.5V
Min. Max.
100
200
3.5
4.7
4
4.7
4
4.7
0
50
1
300
4
100
CAT24WCXX
2.5V-5.5V
4.5V-5.5V
Min. Max. Min. Max.
100 400
Units
kHz
200 200 ns
3.5 1 µs
4.7 1.2 µs
4 0.6 µs
4.7 1.2 µs
4 0.6 µs
4.7 0.6 µs
0 0 ns
50 50 ns
1 0.3 µs
300 300 ns
4 0.6 µs
100 100 ns
Power-Up Timing (1)(2)
Symbol
Parameter
tPUR Power-Up to Read Operation
tPUW
Power-Up to Write Operation
Max.
1
1
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
Units
ms
ms
Write Cycle Limits
Symbol
Parameter
tWR Write Cycle Time
Min.
Typ.
Max
10
Units
ms
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc. No. 1039, Rev. G