GL2L5MS250D.pdf 데이터시트 (총 19 페이지) - 파일 다운로드 GL2L5MS250D 데이타시트 다운로드

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Thin Film Technology. Delay Lines.
Because Timing is Everything.tm
TABLE of CONTENTS
Contents............................................................................................. 2
Introduction........................................................................................3
Definitions..........................................................................................4
Delay Line Test Methods...................................................................5
High Frequency Delay Lines
Single In Line DL1 Series.....................................................6-7
Surface Mount GL1 Series....................................................8-9
Surface Mount GL2 Differential Series.............................10-11
Intermediate Frequency Delay Lines
Single In Line DS1 Series..................................................12-13
Chip Delay Line CL Series..............................................................14
Bandwith Considerations.................................................................15
Complimentary Products
Positive Emitter Coupled Logic (PECL) Terminator..............16
Calibration Standards..............................................................17
Footprint Layouts.............................................................................18
Notes.................................................................................................19
World Wide Sales Offices.................................................Back Cover
Copyright © by Thin Film Technology 1999
Published by the philter circuits Division, 1980 Commerce Drive, N. Mankato, MN 56003
All rights reserved. This book, or parts thereof, may not be reproduced in any form without permission.
Printed in the United States of America.

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The component
needs for future
systems design
will be met with
higher technology.
Thin Film Technology.
High speed system design needs full wave regime implementation in
order to maintain signal fidelity. Harmonics not considered at slower speeds must
be accounted for when fast rise times and high bandwidths are to be used. When
edge rates and circuit speeds enter the sub-nanosecond regime, all components
used in a system design must obey high speed design rules, whether they be pack-
ages, devices, integrated circuits, interconnects, or printed circuit boards.
Thin film component design is uniquely appropriate for high frequency
design: the precision of pattern features, purity of film, stability of substrate mate-
rials, and advanced assembly technologies offer solutions for high speed design.
Wave propagation through correctly designed thin film elements provide for pre-
cise impedance control, a reduction in capacitive and inductive parasitics, and
elimination of ground bounce. Shielded designs protect for electro-magnetic and
radio-frequency interference.
Thin Film Technology Corporation manufactures high speed delay lines
based on microstrip, stripline, and multi-conductor transmission lines. Available
in leaded, surface mount, and chip configuration, these products have performance
to 5 gigahertz. New designs and materials are under continuous development to
extend this range. It is our philosophy that higher technology components can
improve your system performance and lower your costs, both now and in the
future.
High frequency measurement is essential to assure correct device char-
acterization. Attention to field patterns is necessary when representing transmis-
sion lines in order to understand reflections, mismatches, and skin effects. Test
design layout should replicate the field patterns that will actually occur with the
real package, so that accurate device characteristics represented by scattering para-
meters can be made. Proper calibration standards used at the device under test are
sine qua non.

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DEFINITIONS
Scattering Parameters (S-parameters): a two port numbering convention used commonly at high fre-
quencies relating to network measurements. The first number represents the port where the energy is
emerging from the device and the second number is the port where the energy is entering the device.
Incident
transmitted s 21
DUT
port 1
port 2
reflected s11
Parameter s21: The forward transmission coefficient indicating the ratio of energy emerging from port 2
to the energy incident to port 1.
Parameter s11: The reflected transmission coefficient indicating the ratio of energy emerging from port 1
to the energy incident to port 1.
Time Delay (Td): The elapsed time from the 50% on the leading edge of the input pulse to the 50% point
on the leading edge of the delayed pulse.
Network Risetime and Fall time(Tr): The true measure of delayed pulse risetime performance expressed
by the following:
Tr =
(Tr output)2 - (Tr input)2
Input Risetime and Falltime (Tri and Tfi): The time between the 10% and 90% of the input voltage.
Output Risetime and Falltime (Tro and Tfo): The time between the 10% and 90% of the output voltage.
Input and Output Voltage (Ei and Eo): The amplitude of the input and output voltages, respectively.
Attenuation (At): The difference in amplitude between input and output pulses. Attenuation is caused pri-
marily by the Direct Current (DC) resistance of the delay line.
Td
At Pos
90% S
Ei 50%
Eo
Pw
10%
Nos
Tri Tfi Tro
Tfo
Pulsewidth (Pw): The time difference between the 50% point of the leading edge and the 50% point of
the trailing edge of the pulse.
Pulse Distortion (S): The maximum spurious % change, either positive or negative, relative to the pulse
amplitude.
Pulse Edge Over/Undershoot: (Pos, Nos): Peak amplitudes occurring at either the top or bottom of the
output pulse.

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DELAY LINE TEST METHODS
Frequency Domain
Measurement
Network analysis may be used to
measure insertion loss, return loss,
phase and group delay, with signal
stimulus both forward and reverse to
the device. For our passive delay
lines, performance is indicated as
loss in the frequency domain.
The graphed information presented
in this databook is labeled according
to traditional Scattering parameters (S-parameters). S21 and S11 on the following pages
indicates insertion loss (energy incident but lost through the device) and return loss (ener-
gy incident but reflected away from the device). The data is presented in summary form,
but frequency performance data may be requested for specific part numbers.
Time Domain
Measurement
High speed (Rise Time <55 ps) dig-
ital signals are used to stimulate the
device for Rise time (Tro) and Fall
time (Tfo) performance. Data is
presented in the time domain, and is
another measure indicating frequen-
cy performance. Sampling mea-
surements can be used to demon-
strate signal fidelity and can be
processed by a variety of techniques.
Additionally, Time Domain Reflectometry (TDR) measurements may be made to provide
time delay performance as well as detailed impedance mapping of the device transmission
structure. TDR measurements can be performed either in a single end driven mode, or in
a dual end (differential) driven mode, which is necessary for the GL2L Series Differential
Delay Line product.