MM58248.pdf 데이터시트 (총 6 페이지) - 파일 다운로드 MM58248 데이타시트 다운로드

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March 1991
MM58248 High Voltage Display Driver
General Description
The MM58248 is a monolithic MOS integrated circuit utiliz-
ing CMOS metal gate low threshold P- and N-channel devic-
es It is available both in 40-pin molded dual-in-line pack-
ages or as dice The MM58248 is particularly suited for driv-
ing high voltage (60V max) vacuum fluorescent (VF) dis-
plays (e g a 5 x 7 dot matrix display)
Applications
Y COPSTM or microprocessor-driven display
Y Instrumentation readouts
Y Industrial control indicator
Y Digital clock thermostat counter voltmeter
Y Word processor text displays
Y Automotive dashboards
Features
Y Direct interface to high voltage display
Y Serial data input
Y No external resistors required
Y Wide display power supply operation
Y LSTTL compatible inputs
Y Software compatible with NS display driver family
Y Compatible with alphanumeric or dot matrix displays
Y No load signal required
Block Diagram
FIGURE 1
TL F 5599 – 1
COPSTM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5599
RRD-B30M105 Printed in U S A
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Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage at Any Input Pin
Voltage at Any Display Pin
l lVDD a VDIS
Storage Temperature
VDD a 0 3V to VSS b 0 3V
VDD to VDD b 62 5V
62 5V
b65 C to a150 C
Power Dissipation at a25 C
Molded DIP Package Board Mount
Molded DIP Package Socket Mount
2 28W
2 05W
Molded DIP Package Board Mount iJA e 46 C W
Derate 21 7 mW C above a25 C
Molded DIP Package Socket Mount iJA e 51 C W
Derate 19 6 mW C above a25 C
Junction Temperature
Lead Temperature
(Soldering 10 seconds)
Operating Conditions
Min
Supply Voltage (VDD)
VSS e 0V
45
Display Voltage (VDIS)
b55
Temperature Range
b40
Max
55
b25
a85
130 C
260 C
Units
V
V
C
DC Electrical Characteristics
TA e b40 C to a85 C VDD e 5V g0 5V VSS e 0V unless otherwise specified
Symbol
Parameter
Conditions
IDD Power Supply Currents
IDIS
VIL Input Logic Levels
DATA IN CLOCK Logic ‘0’
VIN e VSS or VDD VSS e 0V
VDIS Disconnected
VDD e 5 5V VSS e 0V
VDIS e b55V All Outputs Low
VIH Input Logic Levels
DATA IN CLOCK Logic ‘1’
(Note 1)
IIN
Input Currents DATA IN CLOCK
VIN e 0V or VDD
CIN Input Capacitance DATA IN CLOCK
ROFF
Display Output Impedances
Output Off (Figure 3a)
VDD e 5 5V VSS e 0V
VDIS e b25V
VDIS e b40V
VDIS e b55V
RON
Display Output Impedances
Output on (Figure 3b)
VDD e 5 5V VSS e 0V
VDIS e b25V
VDIS e b40V
VDIS e b55V
VDOL
Display Output
Low Voltage
VDD e 5 5V IOUT e Open Circuit
b55V s VDIS s b25V
Note 1 74LSTTL VOH e 2 7V IOUT e b400 mA TTL VOH e 2 4V IOUT e b400 mA
Min
24
b10
60
70
80
VDIS
AC Electrical Characteristics TA e b40 C to a85 C VDD e 5V g0 5V
Symbol
Parameter
Conditions
Min
fC
Clock Input Frequency
(Notes 2 3)
tH Clock Input High Time
300
tL Clock Input Low Time
300
tDS
Data Input Setup Time
CL e 50 pF
100
tDH Data Input Hold Time
100
Note 2 AC input waveform specification for test purposes tr tf s 20 ns f e 1 MHz 50% g10% duty cycle
Note 3 Clock input rise and fall times must not exceed 5 ms
Typ
Typ Max Units
150 mA
10 mA
08 V
V
10 mA
15 pF
400 kX
550 kX
650 kX
30 40
26 37
23 34
VDIS a 4
kX
kX
kX
V
Max Units
1 0 MHz
ns
ns
ns
ns
2
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Connection Diagrams
Dual-In-Line Package
Plastic Chip Carrier
Top View
TL F 5599 – 2
Order Number MM58248N
See NS Package Number N40A
FIGURE 2
Top View
Order Number MM58248V
See NS Package Number V44A
TL F 5599 – 8
Functional Description
This product is specifically designed to drive multiplexed or
non-multiplexed high voltage alphanumeric or dot matrix
vacuum fluorescent (VF) displays Character generation is
done externally in the microprocessor with a serial data
path to the display driver The MM58248 uses two signals
DATA IN and CLOCK with a format of a leading ‘1’ followed
by the 35 data bits hence allowing data transfer without an
additional signal A block diagram of the MM58248 is shown
in Figure 1
Figure 2 shows the pinout of the MM58248 device where
output 1 (pin 18) is equivalent to bit 1 i e the first bit of data
to be loaded into the shift register following the start bit A
logic ‘1’ at the input will turn on the corresponding display
digit segment dot output
A significant reduction in discrete board components can be
achieved by the use of the MM58248 because external
pull-down resistors are not required Due to the nature of
the output stage both its on and off impedance values vary
as a function of the display voltage applied However Fig-
ures 3a and 3b show that this output impedance will remain
constant for a fixed value of display voltage
Figure 4 demonstrates the critical timing requirements be-
tween CLOCK and DATA IN for the MM58248
In Figure 5 a start bit of logic ‘1’ precedes the 35 bits of
data each bit being accepted on the rising edge of CLOCK
i e a ‘0’ – ‘1’ transition At the 36th clock a LOAD signal is
generated synchronously with the high state of the clock
thus loading the 35 bits of the shift register into the latches
At the low state of the clock a RESET signal is generated
clearing all bits of the shift register for the next set of data
Hence a complete set of 36 clock pulses is needed for the
MM58248 or the shift register will not clear To clear (reset)
the display driver at ‘power on’ or any time the following
flushing routine may be used Clock in 36 ‘‘zeroes’’ fol-
lowed by a ‘‘one’’ (start bit) followed by 35 ‘‘zeroes’’ This
procedure will completely blank the display It is recom-
mended to clear the driver at power on
Figure 6 shows a schematic diagram of a microprocessor-
based system where the MM58248 is used to provide the
anode drive for a 32-digit 5 x 7 dot matrix vacuum fluores-
cent (VF) display The grid drive in this example is provided
by another member of the high voltage display driver family
namely the MM58241 which has the additional features of
a BLANKING CONTROL pin a DATA OUT pin and an
ENABLE (external load signal) pin
3
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Functional Description (Continued)
FIGURE 3a Output Impedance Off
TL F 5599 – 3
Timing Diagrams
FIGURE 3b Output Impedance On
For the purposes of AC measurement VIH e 2 4V VIL e 0 8V
FIGURE 4 Clock and Data Timings
TL F 5599 – 4
TL F 5599 – 5
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FIGURE 5 MM58248 Timings (Data Format)
4
TL F 5599 – 6

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Typical Applications
TL F 5599 – 7
FIGURE 6 Microprocessor-Controlled Word Processor
Physical Dimensions inches (millimeters)
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Molded Dual-In-Line Package (N)
Order Number MM58248N
NS Package Number N40A
5