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General Description
The DS1977 is a 32Kbyte EEPROM in a rugged,
iButton enclosure. Access to the memory can be
password-protected with different passwords for read-
only and full access. Data is transferred serially via
the 1-Wire protocol, which requires only a single data
lead and a ground return. Every DS1977 is factory-
lasered with a guaranteed unique 64-bit registration
number that allows for absolute trace-ability. The
durable stainless steel iButton package is highly
resistant to environmental hazards such as dirt and
shock. Accessories permit the DS1977 iButton to be
mounted on almost any object, including containers,
pallets and bags.
Applications
Maintenance and Inspection of equipment
Medical Information / Health
Data Shuttle for Fleet Management and Vending
applications
Ordering Information
Part Temp Range
DS1977-F5 -40 to 85°C
Pin-Pkg
F5 iButton
DS1977
32KB EEPROM iButton
Features
32KB EEPROM memory
Durable, stainless-steel iButton package
Built-in multi-drop controller ensures
compatibility with other Dallas Semiconductor
1-Wire net products
Unique factory lasered 64-bit registration
number assures error free device selection
and absolute part identity
Supports Overdrive mode
Operating range: 2.8V to 5.25V, -40 to +85°C
Pin Configuration
5.89
0.36
0.51
© 1993
YYWW REGISTERED RR
CxCx 21xx
15C000FBC52B
15C0010-WFBireC52B
16.25
17.35
IO
GND
F5 iButton
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ROM ID field
Like all 1-Wire devices, the DS1977 has a 64-bit lasered ROM identification field. The Family
code of the DS1977 in the 64-bit ROM is to be assigned.
Figure 1. 64-BIT LASERED ROM
MSB
8-Bit
CRC Code
48-Bit Serial Number
MSB LSB MSB
LSB
8-Bit Family
Code (__h)
LSB MSB
LSB
Figure 2. Command Hierarchy
BUS
MASTER
1-Wire net
OTHER
DEVICES
DS1977
COMMAND
LEVEL
1-WIRE ROM FUNCTION
COMMANDS
DS1977 SPECIFIC
FUNCTION COMMANDS
AVAILABLE COMMANDS
READ ROM
MATCH ROM
SEARCH ROM
SKIP ROM
OVERDRIVE MATCH ROM
OVERDRIVE SKIP ROM
RESUME
DATA FIELDS
AFFECTED
64-BIT ROM, RC-FLAG
64-BIT ROM, RC-FLAG
64-BIT ROM, RC-FLAG
RC-FLAG
64-BIT ROM, RC-FLAG, OD-FLAG
RC-FLAG, OD-FLAG
RC-FLAG
WRITE SCRATCHPAD
READ SCRATCHPAD
COPY SCRATCHPAD w/PW
READ MEMORY w/PW
VERIFY PASSWORD
READ VERSION
64-BYTE SCRATCHPAD
64-BYTE SCRATCHPAD
DATA MEMORY, PASSWORDS,
PASSWORD ENABLE BYTE
DATA MEMORY, PASSWORDS,
PASSWORD ENABLE BYTE
PASSWORDS
CONTROL REGISTER
Figure 3. Device Memory Map
ADDRESS RANGE ACCESS TYPE
0000h to 003Fh
R/W
0040h to 007Fh
R/W
0080h to 7F7Fh
R/W
7F80h to 7FBFh
R/W
7FC0h to 7FC7h
W
7FC8h to 7FCFh
W
7FD0h
R/W
7FD1h to 7FFFh
-----
DESCRIPTION
User Data Memory Page 0
User Data Memory Page 1
User Data Memory Pages 2 to 509
User Data Memory Page 510
Read Access Password (A)
Read/Write Access Password (B)
Password Control Register
(reserved)
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Read Access Password, Addresses 7FC0h to 7FC7h
The Read Access Password provides access to the function Read Memory. No password applies
when reading from or writing to the scratchpad. If passwords are enabled (EPW = AAh, see
Password Control Register), the 64-bit data pattern that the 1-Wire master has to transmit with the
command flow is compared to the passwords stored in the DS1977 iButton. If the password
matches, access is granted.
Read/Write Access Password, Addresses 7FC8h to 7FCFh
The Read/Write Access Password provides access to the functions Read Memory and Copy
Scratchpad. No password applies when reading from or writing to the scratchpad. If passwords
are enabled (EPW = AAh, see Password Control Register), the 64-bit data pattern that the 1-Wire
master has to transmit with the command flow is compared to the passwords stored in the
DS1977 iButton. If the password matches, access is granted.
Setting up a password is done essentially in the same way as writing data to the user data
memory, only the address is different. Before changing passwords, disable passwords. When
setting up a password, make sure that all 8 bytes of the password are defined. Otherwise the new
password may be unknown. Since they are located in the same memory page, both passwords
can be redefined at the same time. Always verify the scratchpad before sending the copy
scratchpad command. Before enabling passwords, check whether the new password has been
successfully written to the EEPROM chip. See "Verify Password" command for details. After a
new password is successfully copied from the scratchpad to its memory location, erase the
scratchpad by filling it with new data. Otherwise a copy of the password will remain accessible
through the scratchpad until the iButton is disconnected from the 1-Wire line.
Password Control Register
ADDR b7 b6 b5 b4 b3 b2 b1 b0
7FD0h
EPW
Bit Description
EPW: Enable Passwords
Bit(s)
b0 to
b7
Definition
This byte specifies whether the device will test the validity
of passwords. If the EPW bits form a pattern of
10101010 (AAh), the device will execute these
commands only if the correct password is transmitted. If
the EPW pattern is different from AAh, any data pattern
will be accepted as a valid password. Before enabling
passwords, passwords for read access as well as
read/write access need to be written to the password
registers. The power-on default pattern of EPW is
different from AAh.
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Version Register (DS1977)
ADDR b7 b6 b5 b4 b3 b2 b1 b0
N/A VER2 VER1 VER0
0
0
0
0
0
Bit Description
VER: Chip Revision
Indicator
Bit(s)
b5 to
b7
Definition
These hard-wired bits are used to distinguish different
revisions or chips that use the same 1-Wire family code
as the DS1977. The initial version of the DS1977 chip will
have all revision bits set to 0.
Figure 4. ADDRESS REGISTERS
TARGET ADDRESS (TA1) T7 T6 T5 T4 T3 T2 T1 T0
TARGET ADDRESS (TA2) T15 T14 T13 T12 T11 T10
ENDING ADDRESS WITH
DATA STATUS (E/S) AA PF E5 E4 E3 E2
(READ ONLY)
T9
E1
T8
E0
Address Registers and Transfer Status
Because of the serial data transfer, the DS1977 iButton employs three address registers, called
TA1, TA2 and E/S (Figure ??). Registers TA1 and TA2 must be loaded with the target address to
which the data will be written or from which data will be sent to the 1-Wire master upon a Read
command. Register E/S acts like a byte counter and Transfer Status register. It is used to verify
data integrity with write commands. Therefore, the 1-Wire master only has read access to this
register. The lower six bits of the E/S register indicate the address of the last byte that has been
written to the scratchpad. This address is called Ending Offset. Bit 6 of the E/S register, called PF,
is set if the number of data bits sent by the 1-Wire master is not an integer multiple of 8 or if the
data in the scratchpad is not valid due to a loss of power. A valid write to the scratchpad will clear
the PF bit. Note that the lowest six bits of the target address also determine the address within the
scratchpad, where intermediate storage of data will begin. This address is called byte offset. If the
target address (TA1) for a Write command is 103Ch for example, then the scratchpad will store
incoming data beginning at the byte offset 3Ch and will be full after only four bytes. The
corresponding ending offset in this example is 3Fh. For best economy of speed and efficiency, the
target address for writing should point to the beginning of a new page, i.e., the byte offset will be
0. Thus the full 64-byte capacity of the scratchpad is available, resulting also in the ending offset
of 3Fh. However, it is possible to write one or several contiguous bytes somewhere within a page.
The ending offset together with the Partial Flag support the 1-Wire master checking the data
integrity after a Write command. The highest valued bit of the E/S register, called AA is valid only
if the PF flag reads 0. If PF is 0 and AA is 1, a copy has taken place. The AA bit is cleared when
the device receives a write scratchpad command.
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Writing With Verification
To write data to the DS1977 iButton, the scratchpad has to be used as intermediate storage. First
the 1-Wire master issues the Write Scratchpad command to specify the desired target address,
followed by the data to be written to the scratchpad. Under certain conditions (see Write
Scratchpad command) the 1-Wire master will receive an inverted CRC16 of the command,
address and data at the end of the write scratchpad command sequence. Knowing this CRC
value, the 1-Wire master can compare it to the value it has calculated itself to decide if the
communication was successful and proceed to the Copy Scratchpad command. If the 1-Wire
master could not receive the CRC16, it has to send the Read Scratchpad command to read back
the scratchpad to verify data integrity. As preamble to the scratchpad data, the DS1977 iButton
repeats the target address TA1 and TA2 and sends the contents of the E/S register. If the PF flag
is set, data did not arrive correctly in the scratchpad or there was a loss of power since data was
last written to the scratchpad. The 1-Wire master does not need to continue reading; it can start a
new trial to write data to the scratchpad. Similarly, a set AA flag together with a cleared PF flag
indicates that the Write command was not recognized by the device. If everything went correctly,
both flags are cleared and the ending offset indicates the address of the last byte written to the
scratchpad. Now the 1-Wire master can continue reading and verifying every data byte. After the
1-Wire master has verified the data, it has to send the Copy Scratchpad command. This
command must be followed exactly by the data of the three address registers TA1, TA2 and E/S.
The 1-Wire master may obtain the contents of these registers by reading the scratchpad or derive
it from the target address and the amount of data to be written. As soon as the DS1977 iButton
has received these bytes correctly and the 1-Wire master has provided an acceptable password,
the DS1977 will copy the scratchpad data to the requested location beginning at the target
address.
Memory and Control Functions
The DS1977 supports the following functions:
Write Scratchpad (iButton version only)
Read Scratchpad (iButton version only)
Copy Scratchpad with Password (iButton version only)
Read Memory with Password (iButton version only)
Verify Password (iButton version only)
The following pages provide a short discussion of these functions. For the detailed flow charts
refer to Figure ??. The TA1, TA2, E/S logic is described in section Address Registers and
Transfer Status.
Write Scratchpad Command [0Fh]
After issuing the write scratchpad command, the 1-Wire master must first provide the 2-byte
target address, followed by the data to be written to the scratchpad. The data will be written to the
scratchpad starting at the byte offset (T5:T0). The ending offset (E5: E0) will be the byte offset at
which the 1-Wire master stops writing data. Only full data bytes are accepted. If the last data byte
is incomplete its content will be ignored and the partial byte flag PF will be set. When writing to a
password address, internal circuitry of the chip will force the 3 least significant address bits to 0.
Only full 8-byte passwords are accepted. The ending offset will be 07 or 0F, depending on the
password(s) to be changed.
When executing the Write Scratchpad command the CRC generator inside the DS1977 iButton
(see Figure ??) calculates a CRC over the entire data stream, starting at the command code and
ending at the last data byte sent by the 1-Wire master. This CRC is generated using the CRC16
polynomial by first clearing the CRC generator and then shifting in the command code (0FH) of
the Write Scratchpad command, the Target Addresses TA1 and TA2 as supplied by the 1-Wire
master and all the data bytes. The 1-Wire master may end the Write Scratchpad command at any
time. However, if the ending offset is 3Fh, the 1-Wire master may send 16 read time slots and will
receive the CRC generated by the DS1977 iButton.
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