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SY58021U
4GHz, 1:4 LVPECL Fanout
Buffer/Translator with Internal Termination
Precision Edge®
General Description
The SY58021U is a 2.5V/3.3V precision, high-speed, fully
differential 1:4 LVPECL fanout buffer. Optimized to provide
four identical output copies with less than 15ps output
skew and only 70 fsRMS phase jitter, the SY58021U can
process clock signals as fast as 4GHz.
The differential input includes Micrel’s unique, 3-pin input
termination architecture interfaces to differential LVPECL,
CML, and LVDS signals (AC- or DC-coupled) as small as
100mV without any level-shifting or termination resistor
networks in the signal path. For AC-coupled input interface
applications, an on-board output reference voltage (V )
REFAC
is provided to bias the VT pin. The outputs are 100k
LVPECL compatible, with extremely fast rise/fall times
guaranteed to 70fs.
The SY58021U operates from a 2.5V ±5% supply or 3.3V
±10% supply and is guaranteed over the full industrial
temperature range (–40°C to +85°C). For applications that
require faster rise/fall times, or greater bandwidth, consider
the SY58022U 1:4 fanout buffer with 400mV LVPECL
output swing, or the SY58020U 1:4 CML fanout buffer. The
SY58021U is part of Micrel’s high-speed, Precision Edge®
product line.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Features
Precision Edge®
Precision 1:4 LVPECL fanout buffer
Low jitter performance:
70fsRMS phase jitter (typical)
Accepts an input signal as low as 100mV
Unique input termination and VT pin accepts DC-
coupled and AC-coupled differential inputs: LVPECL,
LVDS, and CML
100k LVPECL-compatible 800mV swing output
Power supply 2.5V ±5% and 3.3V ±10%
• −40°C to +85°C temperature range
Available in 16-pin (3mm × 3mm) QFN package
Applications
All SONET and GigE clock distribution
Fibre Channel clock and data distribution
Backplane distribution
High-end, low-skew, multiprocessor, synchronous clock
distribution
Block Diagram
United States Patent No. RE44,134
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
September 2011
M9999-090111-B
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Micrel, Inc.
\Ordering Information(1)
Part Number
SY58021UMI
SY58021UMITR(2)
SY58021UMG(3)
Package Type
QFN-16
QFN-16
QFN-16
Operating Range
Industrial
Industrial
Industrial
Package Marking
021U
021U
021U with Pb-Free bar-line indicator
SY58021UMGTR(2, 3)
QFN-16
Industrial
021U with Pb-Free bar-line indicator
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electrical only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
Pin Configuration
SY58021U
Lead Finish
Sn-Pb
Sn-Pb
Pb-Free
NiPdAu
Pb-Free
NiPdAu
16-Pin QFN
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SY58021U
Pin Description
Pin Number
1, 4
2
3
8, 13
5, 16
14, 15, 11, 12,
9, 10, 6, 7
Pin Name
IN, /IN
VT
VREF-AC
VCC
GND,
Exposed Pad
/Q0, Q0, /Q1,
Q1, /Q2, Q2,
/Q3, Q3
Pin Function
Differential Input: This input pair receives the signal to be buffered. Each pin of this pair internally
terminates with 50to the VT pin. Note that this input will default to an indeterminate state if left
open. See “Input Interface Applications” section.
Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap
for each input (IN, /IN) to the termination network for maximum interface flexibility. See “Input
Interface Applications” section.
Reference Output Voltage: This output biases to VCC –1.2V. It is used when AC-coupling to
differential inputs. Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor
to VCC. See “Input Interface Applications” section.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCC pins
as possible.
Ground. Exposed pad must be connected to a ground plane that is the same potential as the
ground pin.
LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The output
swing is typically 800mV Proper termination is 50to VCC–2V at the receiving end. Unused
output pairs may be left floating with no impact on jitter or skew. See “LVPECL Output
Termination” section.
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SY58021U
Absolute Maximum Ratings(1)
Power Supply Voltage (VCC)......................... 0.5V to +4.0V
Input Voltage (VIN) ............................................ 0.5V to VCC
LVPECL Output Current (IOUT)
Continuous............................................................50mA
Surge ..................................................................100mA
Source or Sink Current on VT Pin
VT Current .........................................................±100mA
Source or Sink Current on IN, /IN
Input Current.......................................................±50mA
Source or Sink Current on VREF-AC(4)
VREF Current.......................................................±1.5mA
Soldering (20s) ........................................................... 260°C
Storage Temperature (Ts) ......................... 65°C to +150°C
Operating Ratings(2)
Power Supply Voltage (VCC) .................. +2.375V to +3.60V
Operating Temperature Range (TA)............ –40°C to +85°C
Package Thermal Resistance
QFN (θJA)
Still-Air .......................................................+60°C/W
500 lpfm ....................................................+54°C/W
QFN (ψJB)
Junction-to-Board
Resistance(3)
................+33°C/W
Input DC Electrical Characteristics(5)
TA = –40°C to +85°C.
Symbol
VCC
ICC
VIH
VIL
VIN
VDIFF_IN
RIN
VT_IN
VREF-AC
Parameter
Power Supply Voltage
Power Supply Current
Input HIGH Voltage
Input LOW Voltage
Input Voltage Swing
Differential Input Voltage Swing
IN-to-VT Resistance
IN-to-VT Voltage
Output Reference Voltage
Condition
VCC = 2.5V
VCC = 3.3V
No load, VCC = maximum
IN, /IN (Note 6)
IN, /IN
IN, /IN (see Figure 1a)
IN, /IN (see Figure 1b)
Min.
2.375
3.0
VCC 1.6
0
0.1
0.2
40
VCC 1.30
Typ.
2.5
3.3
125
50
VCC 1.2
Max.
2.625
3.60
160
VCC
VIH 0.1
1.7
60
1.28
VCC 1.1
Units
V
mA
V
V
V
V
V
V
Notes:
1. Permanent device damage may occur if ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional
operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum
ratings conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Thermal performance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
4. Due to the limited drive capability, use for input of the same package only.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. VIH (minimum) not lower than 1.2V.
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SY58021U
LVPECL Output DC Electrical Characteristics(5)
VCC = 3.3V ±10% or 2.5 ±5%; RL = 50to VCC 2V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
VOH
VOL
VOUT
VDIFF_OUT
Parameter
Output HIGH Voltage
Output LOW Voltage
Output Voltage Differential Swing
Differential Output Voltage Swing
Condition
(see Figure 1a)
(see Figure 1b)
Min.
VCC 1.145
VCC 1.945
550
1100
Typ.
780
1560
Max.
VCC 0.895
VCC 1.695
1050
2100
Units
V
V
mV
mV
AC Electrical Characteristics
VCC = 2.5V ±5% or 3.3 ±10%; RL = 50to VCC 2V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
fMAX
tPD
tCHAN
tSKEW
tJITTER
tr, tf
Parameter
Maximum Operating Frequency
Propagation Delay
Channel-to-Channel Skew
Part-to-Part Skew
RMS Phase Jitter
Output Rise/Fall Time (20% to 80%)
Condition
VOUT 400mV
Clock
NRZ Data
Note 7
Note 8
Output: 622MHz
Integration Range:
12kHz 20MHz
At full swing
Min.
4
150
35
Typ.
5
220
4
70
75
Max.
300
15
50
110
Units
GHz
Gbps
ps
ps
ps
fs
ps
Notes:
7. Skew is measured between outputs of the same bank under identical transitions.
8. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
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