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CS8363
3.3 V Dual Micropower
Regulator with ENABLE and
RESET
The CS8363 is a precision Micropower dual voltage regulator with
ENABLE and RESET.
The 3.3 V standby output is accurate within 2%, +2.4% while
supplying loads of 100 mA. Quiescent current is low, typically 140 mA
with a 300 mA load. The active RESET output monitors the 3.3 V
standby output and is low during powerup and regulator dropout
conditions. The RESET circuit includes hysteresis and is guaranteed
to operate correctly with 1.0 V on the standby output.
The second output tracks the 3.3 V standby output through an
external adjust lead, and can supply loads of 250 mA. The logic level
lead ENABLE is used to control this tracking regulator output.
Both outputs are protected against overvoltage, short circuit, reverse
battery and overtemperature conditions. The robustness and low
quiescent current of the CS8363 makes it not only well suited for
automotive microprocessor applications, but for any battery powered
microprocessor applications.
Features
2 Regulated Outputs
Standby Output 3.3 V 2%, +2.4%; 100 mA
Adjustable Tracking Output; 250 mA
Operation down to VIN = 4.5 V
RESET for VSTBY
ENABLE for VTRK
Low Quiescent Current
Protection Features
Independent Thermal Shutdown
Short Circuit
60 V Load Dump
Reverse Battery
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D2PAK7
DPS SUFFIX
CASE 936AB
Pin 1. VSTBY
2. VIN
3. VTRK
4. GND
5. Adj
6. ENABLE
7. RESET
MARKING DIAGRAM
CS8363
AWLYWW
1
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
ORDERING INFORMATION*
Device
Package
Shipping
CS8363YDPS7
D2PAK7
50 Units/Rail
CS8363YDPSR7 D2PAK7 750 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
October, 2009 Rev. 12
1
Publication Order Number:
CS8363/D

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CS8363
VIN
Overvoltage
Shutdown
OVSD
VIN
ENABLE
Thermal
Shutdown
GND
Current
Limit
+
Bandgap
BG BG
TSD OVSD
Current
Limit
TSD
+
VSTBY
+ TSD OVSD
BG
RESET
+
VSTBY
3.3 V, 100 mA, 2.0%
RESET
VTRK
250 mA
Adj
RESET
Figure 1. Block Diagram. Consult Your Local Sales Representative for Positive ENABLE Option
ABSOLUTE MAXIMUM RATINGS*
Rating
Value
Unit
Supply Voltage, VIN
Positive Transient Input Voltage, tr > 1.0 ms
16 to 26
60
V
V
Negative Transient Input Voltage, T < 100 ms, 1.0 % Duty Cycle
50 V
Input Voltage Range (ENABLE, RESET)
0.3 to 10
V
Junction Temperature
40 to +150
°C
Storage Temperature Range
55 to +150
°C
ESD Susceptibility (Human Body Model)
2.0 kV
Lead Temperature Soldering
Wave Solder (through hole styles only) Note 1
Reflow (SMD styles only) Note 2
260 peak
230 peak
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 seconds max.
2. 60 seconds max above 183°C
*The maximum package power dissipation must be observed.
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CS8363
ELECTRICAL CHARACTERISTICS (6.0 V VIN 26 V, IOUT1 = IOUT2 = 100 mA, 40°C TA +125°C;
unless otherwise stated.)
Characteristic
Test Conditions
Min Typ
Tracking Output (VTRK)
VTRK Tracking Error (VSTBY VTRK)
6.0 V VIN 26 V, 100 mA ITRK 250 mA.
Note 3
25
Adjust Pin Current, IAdj
Line Regulation
Load Regulation
Dropout Voltage (VIN VTRK)
Current Limit
Quiescent Current
Reverse Current
Ripple Rejection
Standby Output (VSTBY)
Output Voltage, VSTBY
Line Regulation
Load Regulation
Dropout Voltage (VIN VSTBY)
Current Limit
Short Circuit Current
Quiescent Current
Reverse Current
Ripple Rejection
RESET ENABLE Functions
Loop in Regulation
6.0 V VIN 26 V. Note 3
100 mA ITRK 250 mA. Note 3
ITRK = 100 mA.
ITRK = 250 mA
VIN = 12 V, VTRK = 3.0 V
VIN = 12 V, ITRK = 250 mA, No Load on VSTBY
VIN = 12 V, ITRK = 500 mA, ISTBY = 100 mA
VTRK = 3.3 V, VIN = 0 V
f = 120 Hz, ITRK = 250 mA, 7.0 V VIN 17 V
275
60
4.5 V VIN 26 V, 100 mA ISTBY 100 mA.
6.0 V VIN 26 V.
100 mA ISTBY 100 mA.
ISTBY = 100 mA, VIN = 4.2 V
ISTBY = 100 mA, VIN = 4.2 V
VIN = 12 V, VSTBY = 3.0 V
VIN = 12 V, VSTBY = 0 V
VIN = 12 V, ISTBY = 100 mA, ITRK = 0 mA
VIN = 12 V, ISTBY = 300 mA, ITRK = 0 mA
VSTBY = 3.3 V, VIN = 0 V
f = 120 Hz, ISTBY = 100 mA, 7.0 V VIN 17 V
3.234
125
10
60
1.5
5.0
5.0
500
25
145
200
70
3.3
5.0
5.0
200
100
10
140
100
70
ENABLE Input Threshold
0.8 1.2
ENABLE Input Bias Current
RESET Hysteresis
VENABLE = 0 V to 10 V
10 0
10 50
RESET Threshold Low (VRL)
RESET Leakage
VSTBY Decreasing, VIN > 4.5 V
92.5 95
−−
Output Voltage, Low (VRLO)
Output Voltage, Low (VRPEAK)
VIN (VRST Low)
Protection Circuitry (Both Outputs)
1.0 V VSTBY VRL, RRST = 10 kW
VSTBY, Power Up, Power Down
VSTBY = 3.3 V
0.1
0.6
4.0
Independent Thermal Shutdown
Overvoltage Shutdown
VSTBY
VTRK
150 180
150 165
30 34
3. VTRK connected to Adj lead. VTRK can be set to higher values by using an external resistor divider.
Max Unit
+25
5.0
50
50
1.05
1.05
50
220
1500
mV
mA
mV
mV
mV
mV
mA
mA
mA
mA
dB
3.380
50
50
1.05
1.05
20
200
200
V
mV
mV
V
V
mA
mA
mA
mA
mA
dB
2.0 V
10 mA
150 mV
97.5
25
%VSTBY
mA
0.4 V
1.0 V
4.5 V
°C
°C
38 V
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CS8363
PACKAGE PIN #
D2PAK7
1
2
3
4
5
6
7
PACKAGE PIN DESCRIPTION
PIN SYMBOL
VSTBY
VIN
VTRK
GND
Adj
ENABLE
RESET
FUNCTION
Standby output voltage delivering 100 mA.
Input voltage.
Tracking output voltage controlled by ENABLE delivering 250 mA.
Reference ground connection.
Resistor divider from VTRK to Adj. Sets the output voltage on VTRK. If tied to
VTRK, VTRK will track VSTBY.
Provides on/off control of the tracking output, active LOW.
CMOS compatible output lead that goes low whenever VSTBY falls out of
regulation.
CIRCUIT DESCRIPTION
ENABLE Function
The ENABLE function switches the output transistor for
VTRK on and off. When the ENABLE lead voltage exceeds
1.4 V (Typ), VTRK turns off. This input has several hundred
millivolts of hysteresis to prevent spurious output activity
during powerup or powerdown.
RESET Function
The RESET is an open collector NPN transistor,
controlled by a low voltage detection circuit sensing the
VSTBY (3.3 V) output voltage. This circuit guarantees the
RESET output stays below 1.0 V (0.1 V Typ) when VSTBY
is as low as 1.0 V to ensure reliable operation of
microprocessorbased systems.
VTRK Output Voltage
This output uses the same type of output device as VSTBY,
but is rated for 250 mA. The output is configured as a
tracking regulator of the standby output. By using the
standby output as a voltage reference, giving the user an
external programming lead (Adj lead), output voltages from
3.3 V to 20 V are easily realized. The programming is done
with a simple resistor divider, and following the formula:
VTRK + VSTBY (1 ) R1ńR2) ) IAdj R1
If another 3.3 V output is needed, simply connect the Adj
lead to the VTRK output lead.
3.3 V, 100 mA
B+
C1* VIN
VSTBY
C2**
VDD
0.1 mF
CS8363
R3 10 mF
MCU
RESET
ESR < 8.0 W
RESET
ENABLE
Adj
I/O
R2
GND
VTRK
R1
SW 5.0 V,
C3**
250 mA
10 mF
ESR < 8.0 W
GND
VTRK VSTBY(1 + R1/R2)
For VTRK 5.0 V, R1/R2 0.5
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 2. Test and Application Circuit, 3.3 V, 5.0 V Regulator
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CS8363
3.3 V, 100 mA
B+
C1* VIN
VSTBY
C2**
VDD
0.1 mF
CS8363
R3 10 mF
MCU
RESET
ESR < 8.0 W
RESET
ENABLE
I/O
Adj
GND
VTRK
SW 3.3 V,
C3**
250 mA
10 mF
ESR < 8.0 W
GND
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 3. Test and Application Circuit, Dual 3.3 V Regulator
APPLICATION NOTES
External Capacitors
Output capacitors for the CS8363 are required for
stability. Without them, the regulator outputs will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worstcase is determined at the minimum ambient
temperature and maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltages during brief
conditions of negative input transients that might be
characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. To maintain regulator stability down
to 40°C, capacitors rated at that temperature must be used.
More information on capacitor selection for SMART
REGULATOR®s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through the
Literature Distribution Center or via our website at
http://www.onsemi.com.
Calculating Power Dissipation in a
Dual Output Linear Regulator
The maximum power dissipation for a dual output
regulator (Figure 4) is
PD(max) + NJVIN(max) * VOUT1(min)NjIOUT1(max) )
NJVIN(max) * VOUT2(min)NjIOUT2(max) ) VIN(max)IQ (1)
where:
VIN(max) is the maximum input voltage,
VOUT1(min) is the minimum output voltage from VOUT1,
VOUT2(min) is the minimum output voltage from VOUT2,
IOUT1(max) is the maximum output current, for the
application,
IOUT2(max) is the maximum output current, for the
application, and
IQ is the quiescent current the regulator consumes at both
IOUT1(max) and IOUT2(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
RQJA
+
150°
C*
PD
TA
(2)
The value of RqJA can be compared with those in the
package section of the data sheet. Those packages with
RqJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IIN
VIN
SMART
REGULATOR
IOUT1
VOUT1
Control
Features
IOUT2
VOUT2
IQ
Figure 4. Dual Output Regulator With Key
Performance Parameters Labeled.
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