P75N02LD.pdf 데이터시트 (총 3 페이지) - 파일 다운로드 P75N02LD 데이타시트 다운로드

No Preview Available !

www.DataSheet4U.com
NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P75N02LD
TO-252 (D2PAK)
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
25 5mΩ
ID
75A
D
G
1. GATE
2. DRAIN
3. SOURCE
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
TC = 25 °C
TC = 100 °C
Avalanche Current
Avalanche Energy
L = 0.1mH
Repetitive Avalanche Energy2
L = 0.05mH
Power Dissipation
TC = 25 °C
TC = 100 °C
Operating Junction & Storage Temperature Range
Lead Temperature (1/16” from case for 10 sec.)
VGS
ID
IDM
IAR
EAS
EAR
PD
Tj, Tstg
TL
LIMITS
±20
75
50
170
60
140
5.6
65
38
-55 to 150
275
UNITS
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Case
RθJC
Junction-to-Ambient
RθJA
Case-to-Heatsink
RθCS
1Pulse width limited by maximum junction temperature.
2Duty cycle 1
TYPICAL
0.6
MAXIMUM
2.3
62.5
UNITS
°C / W
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V(BR)DSS
VGS(th)
IGSS
IDSS
STATIC
VGS = 0V, ID = 250µA
VDS = VGS, ID = 250µA
VDS = 0V, VGS = ±20V
VDS = 20V, VGS = 0V
VDS = 20V, VGS = 0V, TJ = 125 °C
LIMITS
MIN TYP MAX
UNIT
25
1 1.5
3
V
±250 nA
25
250 µA
1 AUG-02-2001

No Preview Available !

NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P75N02LD
TO-252 (D2PAK)
On-State Drain Current1
Drain-Source On-State
Resistance1
Forward Transconductance1
ID(ON)
RDS(ON)
gfs
VDS = 10V, VGS = 10V
VGS = 10V, ID = 30A
VGS = 7V, ID = 24A
VDS = 15V, ID = 30A
DYNAMIC
70
5
6
16
7
8
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge2
Gate-Source Charge2
Gate-Drain Charge2
Turn-On Delay Time2
Rise Time2
Turn-Off Delay Time2
Fall Time2
Ciss
Coss
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VGS = 0V, VDS = 15V, f = 1MHz
VDS = 0.5V(BR)DSS, VGS = 10V,
ID = 35A
VDS = 15V, RL = 1Ω
ID 30A, VGS = 10V, RGS = 2.5Ω
5000
1800
800
140
40
75
7
7
24
6
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
Pulsed Current3
Forward Voltage1
IS
ISM
VSD IF = IS, VGS = 0V
Reverse Recovery Time
trr
37
Peak Reverse Recovery Current
IRM(REC)
IF = IS, dlF/dt = 100A / µS
200
Reverse Recovery Charge
Qrr
1Pulse test : Pulse Width 300 µsec, Duty Cycle 2.
2Independent of operating temperature.
3Pulse width limited by maximum junction temperature.
0.043
75
170
1.3
A
mΩ
S
pF
nC
nS
A
V
nS
A
µC
REMARK: THE PRODUCT MARKED WITH “P75N02LD”, DATE CODE or LOT #
2 AUG-02-2001

No Preview Available !

NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P75N02LD
TO-252 (D2PAK)
TO-252 (DPAK) MECHANICAL DATA
Dimension
A
B
C
D
E
F
G
Min.
9.35
2.2
0.48
0.89
0.45
0.03
6
mm
Typ.
Max.
10.1
2.4
0.6
1.5
0.6
0.23
6.2
Dimension
H
I
J
K
L
M
N
Min.
6.4
5.2
0.6
0.64
4.4
mm
Typ.
0.8
Max.
6.6
5.4
1
0.9
4.6
3 AUG-02-2001