NOT RECOMMENDED FOR NEW DESIGNS
3.3V SINGLE SUPPLY QUAD
■ 3.3V power supply
■ Translates positive ECL to TTL (PECL-to-TTL)
■ 300ps pin-to-pin skew
■ 500ps part-to-part skew
■ Differential internal design for increased noise
immunity and stable threshold inputs
■ VBB reference output
■ Single supply
■ Enable input
■ Latch enable input
■ Extra TTL and ECL power/ground pins to reduce
■ High drive capability: 24mA each output
■ Fully compatible with industry standard 10K, 100K
■ Available in 16-pin SOIC package
The SY10/100H841L are single supply, low skew
translating 1:4 clock drivers.
The devices feature a 24mA TTL output stage, with
AC performance specified into a 20pF load capacitance.
A latch is provided on-chip. When LEN is LOW (or left
open, in which case it is pulled low by the internal pull-
downs) the latch is transparent. A HIGH on the enable
pin (EN) forces all outputs LOW.
As frequencies increase to 40MHz and above, precise
timing and shaping of clock signals becomes extremely
important. The H841 solves several clock distribution
problems such as minimizing skew (300ps), maximizing
clock fanout (24mA drive), and precise duty cycle control
through a proprietary differential internal design.
The 10K version is compatible with 10KH ECL logic
levels. The 100K version is compatible with 100K levels.
GT TTL Ground (0V)
VT TTL VCC (+3.3V)
VE ECL VCC (+3.3V)
Q1 GE ECL Ground (0V)
Signal Input (PECL)
VBB VBB Reference Output (PECL)
Q0 - Q3
Signal Outputs (TTL)
EN Enable Input (PECL)
LEN Latch Enable Input
Precision Edge is a registered trademark of Micrel, Inc.
email@example.com or (408) 955-1690
Rev.: E Amendment: /0
Issue Date: March 2006