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August 1998
54AC646
Octal Transceiver/Register with TRI-STATE® Outputs
General Description
The ’AC646 consist of registered bus transceiver circuits,
with outputs, D-type flip-flops and control circuitry providing
multiplexed transmission of data directly from the input bus
or from the internal storage registers. Data on the A or B bus
will be loaded into the respective registers on the
LOW-to-HIGH transition of the appropriate clock pin (CPAB
or CPBA). The four fundamental data handling functions
available are illustrated in Figures 1, 2, 3, 4.
n Multiplexed real-time and stored data transfers
n TRI-STATE outputs
n 300 mil slim dual-in-line package
n Outputs source/sink 24 mA
n ’ACT646 has TTL compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC646: 5962-89682
Features
n Independent registers for A and B buses
Logic Symbols
DS100231-1
Pin Names
A0– A7
B0– B7
CPAB, CPBA
SAB, SBA
G
DIR
Description
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
IEEE/IEC
DS100231-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100231
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Connection Diagrams
Pin Assignment
for DIP and Flatpak
DS100231-3
Real Time Transfer
A-Bus to B-Bus
DS100231-7
FIGURE 1.
Real Time Transfer
B-Bus to A-Bus
DS100231-8
FIGURE 2.
Pin Assignment
for LCC
DS100231-4
Storage from
Bus to Register
DS100231-9
FIGURE 3.
Transfer from
Register to Bus
DS100231-10
FIGURE 4.
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Function Table
Inputs
Data I/O (Note 1)
Function
G DIR CPAB
H X H or L
CPBA SAB SBA A0–A7
H or L X X
B0– B7
Isolation
HX
N
X
X X Input
Input Clock An Data into A Register
HX
X
N XX
Clock Bn Data into B Register
LH
X
X LX
An to Bn — Real Time (Transparent Mode)
LH
N
X
LX
Input
Output Clock An Data into A Register
L H H or L X H X
A Register to Bn (Stored Mode)
LH
N
X HX
Clock An Data into A Register and Output to Bn
LL
X
X XL
Bn to An — Real Time (Transparent Mode)
LL
X
N X L Output Input Clock Bn Data into B Register
L L X H or L X H
B Register to An (Stored Mode)
LL
X
N XH
Clock Bn Data into B Register and Output to An
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
N = LOW-to-HIGH Transition
Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the
bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
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Logic Diagram
DS100231-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Junction Temperature (TJ)
CDIP
Recommended Operating
175˚C
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
−0.5V to +7.0V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
±50 mA
±50 mA
−65˚C to +150˚C
Conditions
Supply Voltage (VCC)
’AC
2.0V to 6.0V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
54AC
0V to VCC
0V to VCC
−55˚C to +125˚C
Minimum Input Edge Rate (V/t)
’AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
125 mV/ns
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT® circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
Symbol
Parameter
VIH Minimum High Level
Input Voltage
VIL Maximum Low Level
Input Voltage
VOH Minimum High Level
Output Voltage
VOL Maximum Low Level
Output Voltage
IIN
IOLD
IOHD
Maximum Input
Leakage Current
Minimum Dynamic
Output Current
(Note 4)
54AC
VCC
TA =
(V) −55˚C to +125˚C
Guaranteed
Limits
3.0 2.1
4.5 3.15
5.5 3.85
3.0 0.9
4.5 1.35
5.5 1.65
3.0 2.9
4.5 4.4
5.5 5.4
3.0 2.4
4.5 3.7
5.5 4.7
3.0 0.1
4.5 0.1
5.5 0.1
3.0 0.50
4.5 0.50
5.5 0.50
5.5 ±1.0
5.5 50
5.5 −50
Units
Conditions
VOUT = 0.1V
V or VCC − 0.1V
VOUT = 0.1V
V or VCC − 0.1V
IOUT = −50 µA
V
(Note 3)
VIN = VIL or VIH
IOH = −12 mA
V IOH = −24 mA
IOH = −24 mA
IOUT = 50 µA
V
(Note 3)
VIN = VIL or VIH
IOH = 12 mA
V IOL = 24 mA
IOH = 24 mA
µA VI = VCC, GND
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
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