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August 1998
54AC821 54ACT821
10-Bit D Flip-Flop with TRI-STATE® Outputs
General Description
The ’AC/’ACT821 is a 10-bit D flip-flop with TRI-STATE out-
puts arranged in a broadside pinout.
The ’AC/’ACT821 is functionally identical to the AM29821.
Features
n TRI-STATE outputs for bus interfacing
n Noninverting outputs
n Outputs source/sink 24 mA
n ’ACT821 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’ACT821: 5962-88705
— ’AC821: 5962-91606
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP and Flatpak
IEEE/IEC
DS100355-1
Pin Names
D0– D9
O0– O9
OE
CP
DS100355-2
Description
Data Inputs
Data Outputs
Output Enable Input
Clock Input
DS100355-3
Pin Assignment for LCC
DS100355-4
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100355
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Functional Description
The ’AC/’ACT821 consists of ten D-type edge-triggered
flip-flops. The buffered Clock (CP) and buffered Output En-
able (OE) are common to all flip-flops. The flip-flops will store
the state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH CP transition.
With OE LOW the contents of the flip-flops are available at
the outputs. When OE is HIGH the outputs go to the high im-
pedance state. Operation of the OE input does not affect the
state of the flip-flops.
The ’AC/’ACT821 is functionally and pin compatible with the
AM29821.
Function Table
Inputs
OE CP D
H NL
H NH
L NL
L NH
H = HIGH Voltage Level
L = LOW Voltage Level
Z = HIGH Impedance
N = LOW-to-HIGH Clock Transition
Internal
Q
L
H
L
H
Outputs
O
Z
Z
L
H
Function
High Z
High Z
Load
Load
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
DS100355-5
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Absolute Maximum Ratings (Note 1)
Recommended Operating
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
Junction Temperature (TJ)
CDIP
−0.5V to +7.0V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
±50 mA
±50 mA
−65˚C to +150˚C
175˚C
Conditions
Supply Voltage (VCC)
’AC
2.0V to 6.0V
’ACT
4.5V to 5.5V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
54AC/ACT
0V to VCC
0V to VCC
−55˚C to +125˚C
Minimum Input Edge Rate (V/t)
’AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (V/t)
125 mV/ns
’ACT Devices
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT® circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
Symbol
Parameter
VIH Minimum High Level
Input Voltage
VIL Maximum Low Level
Input Voltage
VOH Minimum High Level
Output Voltage
VOL Maximum Low Level
Output Voltage
IIN Maximum Input
Leakage Current
IOZ Maximum TRI-STATE
Current
54AC
VCC
TA = −55˚C to +125˚C
Units
(V) Guaranteed Limits
Conditions
3.0 2.1
4.5 3.15
5.5 3.85
VOUT = 0.1V
V or VCC − 0.1V
3.0 0.9
4.5 1.35
5.5 1.65
VOUT = 0.1V
V or VCC − 0.1V
3.0 2.9
4.5 4.4
IOUT = −50 µA
V
5.5 5.4
(Note 2)
3.0 2.4
4.5 3.7
5.5 4.7
3.0 0.1
4.5 0.1
VIN = VIL or VIH
IOH = −12 mA
V IOH = −24 mA
IOH = −24 mA
IOUT = 50 µA
V
5.5 0.1
(Note 2)
VIN = VIL or VIH
3.0 0.50
IOL = 12 mA
4.5 0.50
V IOL = 24 mA
5.5 0.50
IOL = 24 mA
5.5 ±1.0 µA VI = VCC, GND
VI (OE) = VIL, VIH
5.5 ±10.0 µA VI = VCC, GND
VO = VCC, GND
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DC Characteristics for ’AC Family Devices (Continued)
Symbol
Parameter
IOLD
IOHD
ICC
(Note 3)
Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
54AC
VCC TA = −55˚C to +125˚C
(V) Guaranteed Limits
5.5 50
5.5 −50
5.5 160.0
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C.
DC Characteristics for ’ACT Family Devices
Symbol
Parameter
VIH Minimum High Level
Input Voltage
VIL Maximum Low Level
Input Voltage
VOH Minimum High Level
Output Voltage
54ACT
VCC TA = −55˚C to +125˚C
(V) Guaranteed Limits
4.5 2.0
5.5 2.0
4.5 0.8
5.5 0.8
4.5 4.4
5.5 5.4
VOL Maximum Low Level
Output Voltage
4.5
5.5
4.5
5.5
3.70
4.70
0.1
0.1
IIN
IOZ
ICCT
IOLD
IOHD
ICC
Maximum Input
Leakage Current
Maximum TRI-STATE
Current
Maximum
ICC/Input
(Note 6)
Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
4.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
Note 7: ICC for 54ACT @ 25˚C is identical to 74ACT @ 25˚C.
0.50
0.50
±1.0
±10.0
1.6
50
−50
160.0
Units
Conditions
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC
or GND
Units
Conditions
V VOUT = 0.1V
or VCC − 0.1V
V VOUT = 0.1V
or VCC − 0.1V
V IOUT = −50 µA
(Note 5)
VIN = VIL or VIH
V IOH = −24 mA
IOH = −24 mA
V IOUT = 50 µA
(Note 5)
VIN = VIL or VIH
V IOL = 24 mA
IOL = 24 mA
µA VI = VCC, GND
µA VI = VIL, VIH
VO = VCC, GND
mA VI = VCC − 2.1V
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC
or GND
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AC Electrical Characteristics
Symbol
Parameter
fmax Maximum Clock
Frequency
tPLH Propagation Delay
CP to On
tPHL Propagation Delay
CP to On
tPZH Output Enable Time
OE to On
tPZL Output Enable Time
OE to On
tPHZ Output Disable Time
OE to On
tPLZ Output Disable Time
OE to On
Note 8: Voltage Range 3.3 is 3.3V ±0.3V
Note 9: Voltage Range 5.0 is 5.0V ±0.5V
VCC
(V)
(Note 8)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
54AC
TA = −55˚C to +125˚C
CL = 50 pF
Min Max
95
100
1.0 13.0
1.5 9.5
1.0 13.0
1.5 9.5
1.0 13.0
1.5 9.5
1.0 13.0
1.5 9.5
1.0 12.0
1.5 10.0
1.0 12.0
1.5 10.0
AC Operating Requirements
Symbol
Parameter
ts Setup Time, HIGH or LOW
Dn to CP
th Hold Time, HIGH or LOW
Dn to CP
tw CP Pulse Width
HIGH or LOW
Note 10: Voltage Range 3.3 is 3.3V ±0.3V
Note 11: Voltage Range 5.0 is 5.0V ±0.5V
VCC
(V)
(Note 10)
3.3
5.0
3.3
5.0
3.3
5.0
54AC
TA = −55˚C to +125˚C
CL = 50 pF
Guaranteed Minimum
3.0
3.0
3.0
3.0
6.0
5.0
AC Electrical Characteristics
Symbol
Parameter
fmax Maximum Clock
Frequency
tPLH Propagation Delay
CP to On
tPHL Propagation Delay
CP to On
tPZH Output Enable Time
OE to On
VCC
(V)
(Note 12)
5.0
5.0
5.0
5.0
54ACT
TA = −55˚C
to +125˚C
CL = 50 pF
Min Max
85
1.5 11.5
1.5 11.5
1.5 12.5
5
Units
MHz
ns
ns
ns
ns
ns
ns
Fig.
No.
Units
ns
ns
ns
Fig.
No.
Units
MHz
ns
ns
ns
Fig.
No.
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