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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by J308/D
JFET VHF/UHF Amplifiers
N–Channel — Depletion
3
GATE
1 DRAIN
J308
J309
J310
Motorola Preferred Devices
2 SOURCE
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Drain – Source Voltage
Gate–Source Voltage
Forward Gate Current
Total Device Dissipation @ TA = 25°C
Derate above 25°C
VDS
VGS
IGF
PD
25 Vdc
25 Vdc
10 mAdc
350 mW
2.8 mW/°C
Junction Temperature Range
TJ – 65 to +125
Storage Temperature Range
Tstg – 65 to +150
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
°C
°C
Symbol
OFF CHARACTERISTICS
Gate – Source Breakdown Voltage
(IG = –1.0 µAdc, VDS = 0)
V(BR)GSS
Gate Reverse Current
(VGS = –15 Vdc, VDS = 0, TA = 25°C)
(VGS = –15 Vdc, VDS = 0, TA = +125°C)
Gate Source Cutoff Voltage
(VDS = 10 Vdc, ID = 1.0 nAdc)
J308
J309
J310
IGSS
VGS(off)
ON CHARACTERISTICS
Zero – Gate –Voltage Drain Current(1)
(VDS = 10 Vdc, VGS = 0)
J308
J309
J310
IDSS
Gate–Source Forward Voltage
(VDS = 0, IG = 1.0 mAdc)
VGS(f)
SMALL– SIGNAL CHARACTERISTICS
Common–Source Input Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
J308
J309
J310
Re(yis)
Common–Source Output Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yos)
Common–Gate Power Gain
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
v v1. Pulse Test: Pulse Width 300 µs, Duty Cycle 3.0%.
Gpg
Min
– 25
– 1.0
– 1.0
– 2.0
12
12
24
1
2
3
CASE 29–04, STYLE 5
TO–92 (TO–226AA)
Typ Max Unit
— — Vdc
— –1.0 nAdc
— –1.0 µAdc
Vdc
— – 6.5
— – 4.0
— – 6.5
mAdc
— 60
— 30
— 60
— 1.0 Vdc
mmhos
0.7 —
0.7 —
0.5 —
0.25 — mmhos
16 — dB
Motorola Small–Signal Transistors, FETs and Diodes Device Data
© Motorola, Inc. 1997
1

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J308 J309 J310
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic
Symbol
SMALL– SIGNAL CHARACTERISTICS (continued)
Common–Source Forward Transconductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yfs)
Common–Gate Input Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yig)
Common–Source Forward Transconductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
J308
J309
J310
gfs
Common–Source Output Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
gos
Common–Gate Forward Transconductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
J308
J309
J310
gfg
Common–Gate Output Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
J308
J309
J310
gog
Gate–Drain Capacitance
(VDS = 0, VGS = –10 Vdc, f = 1.0 MHz)
Cgd
Gate–Source Capacitance
(VDS = 0, VGS = –10 Vdc, f = 1.0 MHz)
Cgs
FUNCTIONAL CHARACTERISTICS
Noise Figure
(VDS = 10 Vdc, ID = 10 mAdc, f = 450 MHz)
NF
Equivalent Short–Circuit Input Noise Voltage
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 Hz)
en
Min
8000
10000
8000
Typ
12
12
13000
13000
12000
150
100
150
1.8
4.3
1.5
10
Max Unit
— mmhos
— mmhos
20000
20000
18000
250
µmhos
µmhos
µmhos
µmhos
2.5 pF
5.0 pF
— dB
nVń ǸHz
2 Motorola Small–Signal Transistors, FETs and Diodes Device Data

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50
SOURCE
U310
C3
L1 C1
C5
L2P
C2
C6
50
LOAD
L2S
C4
C7
1.0 k
RFC
+VDD
C1 = C2 = 0.8 – 10 pF, JFD #MVM010W.
C3 = C4 = 8.35 pF Erie #539–002D.
C5 = C6 = 5000 pF Erie (2443–000).
C7 = 1000 pF, Allen Bradley #FA5C.
RFC = 0.33 µH Miller #9230–30.
L1 = One Turn #16 Cu, 1/4I.D. (Air Core).
L2P = One Turn #16 Cu, 1/4I.D. (Air Core).
L2S = One Turn #16 Cu, 1/4I.D. (Air Core).
Figure 1. 450 MHz Common–Gate Amplifier Test Circuit
J308 J309 J310
70 70
60
VDS = 10 V
50
IDSS
40 + 25°C
TA = – 55°C
+ 25°C
60
50
40
30 +150°C 30
20
+ 25°C
20
– 55°C
10 +150°C 10
–5.0 –4.0 –3.0 –2.0 –1.0
ID – VGS, GATE–SOURCE VOLTAGE (VOLTS)
IDSS – VGS, GATE–SOURCE CUTOFF VOLTAGE (VOLTS)
0
0
Figure 2. Drain Current and Transfer
Characteristics versus Gate–Source Voltage
35
30 VDS = 10 V
f = 1.0 MHz
25
TA = – 55°C
+ 25°C
20
15
10
5.0
0
5.0
+150°C
– 55°C
+ 25°C
+150°C
4.0 3.0 2.0 1.0
VGS, GATE–SOURCE VOLTAGE (VOLTS)
0
Figure 3. Forward Transconductance
versus Gate–Source Voltage
100 k
10 k
1.0 k
Yfs Yfs
100
1.0 k
VGS(off) = – 2.3 V =
10
Yos VGS(off) = – 5.7 V =
100
0.01
1.0
0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100
ID, DRAIN CURRENT (mA)
Figure 4. Common–Source Output
Admittance and Forward Transconductance
versus Drain Current
10 120
RDS
96
7.0
72
Cgs
4.0 48
Cgd
1.0
0
10 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0
VGS, GATE SOURCE VOLTAGE (VOLTS)
24
0
0
Figure 5. On Resistance and Junction
Capacitance versus Gate–Source Voltage
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3

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J308 J309 J310
30 3.0
24 VDS = 10 V
ID = 10 mA
TA = 25°C
18
2.4
Y11
1.8
12 Y21 1.2
6.0 Y22 0.6
Y12
0
100
200 300
500 700 1000
f, FREQUENCY (MHz)
Figure 6. Common–Gate Y Parameter
Magnitude versus Frequency
θ21, θ11
180° 50°
170° 40°
160° 30°
150° 20°
140° 10°
130° 0°
100
θ12, θ22
– 20° 87°
θ22 – 20°
– 40° 86°
θ21 – 60°
– 80° 85°
– 100°
θ12
θ11
VDS = 10 V
ID = 10 mA
TA = 25°C
200 300 500 700
f, FREQUENCY (MHz)
– 120°
– 140°
– 160°
– 180°
– 200°
1000
84°
83°
82°
Figure 8. Common–Gate Y Parameter
Phase–Angle versus Frequency
|S21|, |S11|
0.85 0.45
|S12|, |S22|
0.060 1.00
0.79 0.39
0.73 0.33
0.67 0.27
VDS = 10 V
ID = 10 mA
TA = 25°C
S22
S21
0.048 0.98
0.036 0.96
0.024 0.94
0.61 0.21
S11
0.012 0.92
0.55 0.15
100
S12
200 300
500 700 1000
f, FREQUENCY (MHz)
0.90
Figure 7. Common–Gate S Parameter
Magnitude versus Frequency
θ11, θ12
– 20° 120°
θ11
– 40° 100° θ21
θ22
θ21, θ22
0
– 20°
– 60° 80°
– 40°
– 80° 60°
θ12
– 100° 40°
– 120° 20°
100
θ21 – 60°
VDS = 10 V
ID = 10 mA
TA = 25°C
θ11
200 300 500 700
f, FREQUENCY (MHz)
– 80°
– 100°
1000
Figure 9. S Parameter Phase–Angle
versus Frequency
8.0
7.0 VDD = 20 V
f = 450 MHz
6.0 BW 10 MHz
CIRCUIT IN FIGURE 1
5.0
4.0
3.0
Gpg
NF
24
21
18
15
12
9.0
2.0 6.0
1.0 3.0
0
4.0 6.0 8.0
10 12 14 16 18 20
ID, DRAIN CURRENT (mA)
22
Figure 10. Noise Figure and
Power Gain versus Drain Current
0
24
7.0
6.0
5.0
4.0 VDS = 10 V
ID = 10 mA
3.0 TA = 25°C
CIRCUIT IN FIGURE 1
2.0
Gpg
NF
1.0
0
50 100 200 300
f, FREQUENCY (MHz)
26
22
18
14
10
6.0
2.0
500 700 1000
Figure 11. Noise Figure and Power Gain
versus Frequency
4 Motorola Small–Signal Transistors, FETs and Diodes Device Data

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C1
INPUT L1
RS = 50
C2
L2
VS
S
G
C3
U310
D
C4
SHIELD
C6
L3 OUTPUT
RL = 50
C5
L4
VD
J308 J309 J310
BW (3 dB) – 36.5 MHz
ID – 10 mAdc
VDS – 20 Vdc
Device case grounded
IM test tones – f1 = 449.5 MHz, f2 = 450.5 MHz
C1 = 1–10 pF Johanson Air variable trimmer.
C2, C5 = 100 pF feed thru button capacitor.
C3, C4, C6 = 0.5–6 pF Johanson Air variable
trimmer.
L1 = 1/8x 1/32x 1–5/8copper bar.
L2, L4 = Ferroxcube Vk200 choke.
L3 = 1/8x 1/32x 1–7/8copper bar.
Figure 12. 450 MHz IMD Evaluation Amplifier
Amplifier power gain and IMD products are a function of the load impedance. For the amplifier design shown above with C4 and
C6 adjusted to reflect a load to the drain resulting in a nominal power gain of 9 dB, the 3rd order intercept point (IP) value is
29 dBm. Adjusting C4, C6 to provide larger load values will result in higher gain, smaller bandwidth and lower IP values. For
example, a nominal gain of 13 dB can be achieved with an intercept point of 19 dBm.
+40
U310 JFET
+20 VDS = 20 Vdc
ID = 10 mAdc
0 F1 = 449.5 MHz
F2 = 450.5 MHz
–20
3RD ORDER INTERCEPT POINT
FUNDAMENTAL OUTPUT
–40
–60
–80
3RD ORDER IMD OUTPUT
–100
–120
–120 –100 –80 –60 –40 –20
INPUT POWER PER TONE (dBm)
0
+20
Example of intercept point plot use:
Assume two in–band signals of –20 dBm at the amplifier input.
They will result in a 3rd order IMD signal at the output of
–90 dBm. Also, each signal level at the output will be
–11 dBm, showing an amplifier gain of 9.0 dB and an
intermodulation ratio (IMR) capability of 79 dB. The gain and
IMR values apply only for signal levels below comparison.
Figure 13. Two Tone 3rd Order Intercept Point
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5