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FQB5N50C/FQI5N50C
500V N-Channel MOSFET
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
• 5A, 500V, RDS(on) = 1.4 @VGS = 10 V
• Low gate charge ( typical 18nC)
• Low Crss ( typical 15pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
I2-PAK
G D Swww.DataSheeFt4QU.IcoSmeries
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Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
FQB5N50C/FQI5N50C
500
5
2.9
20
± 30
300
5
7.3
4.5
73
0.58
-55 to +150
300
Typ Max
-- 1.71
-- 40
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003

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Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 500 V, VGS = 0 V
VDS = 400 V, TC = 125°C
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
500
--
--
--
--
--
--
0.5
--
--
--
--
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 2.5A
VDS = 40 V, ID = 2.5A
(Note 4)
2.0
--
--
--
1.14
5.2
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 480
-- 80
-- 15
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 250 V, ID = 5A,
RG = 25
(Note 4, 5)
VDS = 400 V, ID = 5A,
VGS = 10 V
(Note 4, 5)
--
--
--
--
--
--
--
12
46
50
48
18
2.2
9.7
--
--
1
10
100
-100
4.0
1.4
--
625
105
20
35
100
110
105
24
--
--
V
V/°C
µA
µA
nA
nA
V
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- --
5
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- 20
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 5 A
-- -- 1.4
trr Reverse Recovery Time
VGS = 0 V, IS = 5 A,
-- 263
--
Qrr Reverse Recovery Charge
dIF / dt = 100 A/µs
(Note 4) --
1.9
--
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 21.5 mH, IAS = 5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 5A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
A
A
V
ns
µC
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003

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Typical Characteristics
V
Top : 15.0GSV
10.0 V
101
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom: 5.0 V
100
10-1
10-1
Notes :
1. 250μ s Pulse Test
2. TC = 25
100 101
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
4.5
4.0
3.5
V = 10V
GS
3.0
2.5
2.0
V = 20V
GS
1.5
1.0 Note : TJ = 25
0.5
0 5 10 15
ID, Drain Current [A]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
1200
1000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
800 C
iss
Coss
600
400
C
rss
Notes ;
1. VGS = 0 V
2. f = 1 MHz
200
0
10-1 100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2003 Fairchild Semiconductor Corporation
101
150oC
25oC
100
-55oC
10-1
2
Notes :
1.
2.
V25DS0μ=s40PVulse
Test
468
VGS, Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
101
100
10-1
0.2
150
25
Notes :
1.
2.
2V5G0Sμ=s0VPulse
Test
0.4 0.6 0.8 1.0 1.2
VSD, Source-Drain voltage [V]
1.4
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
10 V = 100V
DS
V = 250V
8 DS
V = 400V
DS
6
4
2
Note : ID = 5A
0
0 5 10 15 20
Q , Total Gate Charge [nC]
G
Figure 6. Gate Charge Characteristics
Rev. A, August 2003

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes:
1.
2.
IVDG=S =2500Vμ
A
0.8
-100
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs Temperature
102
Operation in This Area
is Limited by R DS(on)
10 µs
101 100 µs
1 ms
10 ms
100 ms
100 DC
10-1
10-2
100
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
VDS, Drain-Source Voltage [V]
103
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = 10 V
2. ID = 2.5 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs Temperature
6
5
4
3
2
1
0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs Case Temperature
100 D = 0 .5
0 .2
0 .1
1 0 -1
0 .0 5
0 .0 2
0 .0 1
1 0 -2
1 0 -5
N otes :
1. Zθ
(t)
JC
=
1 .7 1
/W
Max.
2. D uty Factor, D =t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Zθ
(t)
JC
sin g le p u ls e
PDM
t1
t2
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a ve P u lse D u ra tio n [se c]
101
Figure 11. Transient Thermal Response Curve
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003

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Gate Charge Test Circuit & Waveform
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
10V
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS
=
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
10V
tp
DUT
VDD VDS (t)
t p Time
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003