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®
Data Sheet
X1226
4K (512 x 8), 2-Wire™ RTC
May 8, 2006
FN8098.3
Real Time Clock/Calendar with EEPROM
FEATURES
• Real Time Clock/Calendar
—Tracks Time in Hours, Minutes, and Seconds
—Day of the Week, Day, Month, and Year
• 2 Polled Alarms (Non-volatile)
—Settable on the Second, Minute, Hour, Day of
the Week, Day, or Month
—Repeat Mode (periodic interrupts)
• Oscillator Compensation On Chip
—Internal Feedback Resistor and Compensation
Capacitors
—64 Position Digitally Controlled Trim Capacitor
—6 Digital Frequency Adjustment Settings to
±30ppm
• Battery Switch or Super Cap Input
• 512 x 8 Bits of EEPROM
—64-Byte Page Write Mode
—8 Modes of Block Lock™ Protection
—Single Byte Write Capability
• High Reliability
—Data Retention: 100 Years
www.DataSheet4U.com — Endurance: 100,000 Cycles Per Byte
• 2-Wire™ Interface Interoperable with I2C
—400kHz Data Transfer Rate
• Frequency Output (SW Selectable: Off, 1Hz,
4096Hz or 32.768kHz)
• Low Power CMOS
—1.25µA Operating Current (Typical)
• Small Package Options
—8 Ld SOIC and 8 Ld TSSOP
• Repetitive Alarms
• Temperature Compensation
• Pb-Free Plus Anneal Available (RoHS Compliant)
APPLICATIONS
• Utility Meters
• HVAC Equipment
• Audio/Video Components
• Set Top Box/Television
• Modems
• Network Routers, Hubs, Switches, Bridges
• Cellular Infrastructure Equipment
• Fixed Broadband Wireless Equipment
• Pagers/PDA
• POS Equipment
• Test Meters/Fixtures
• Office Automation (Copiers, Fax)
• Home Appliances
• Computer Products
• Other Industrial/Medical/Automotive
DESCRIPTION
The X1226 device is a Real Time Clock with
clock/calendar, two polled alarms with integrated
512x8 EEPROM, oscillator compensation, and battery
backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving
board area and component cost.
BLOCK DIAGRAM
OSC
Compensation
32.768kHz
X1
X2
PHZ/IRQ
Select
Oscillator
Frequency 1Hz
Divider
Timer
Calendar
Logic
Time
Keeping
Registers
(SRAM)
Battery
Switch
Circuitry
VCC
VBACK
SCL
SDA
Serial
Interface
Decoder
Control
Decode
Logic
8
Control/
Registers
(EEPROM)
Status
Registers
(SRAM)
Alarm
Compare
Alarm Regs
(EEPROM)
4K
EEPROM
ARRAY
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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X1226
Ordering Information
PART NUMBER
X1226S8*
X1226S8Z* (Note)
X1226S8I*
X1226S8IZ* (Note)
X1226V8*
X1226V8Z* (Note)
PART MARKING
X1226
X1226Z
X1226I
X1226ZI
1226
1226Z
VDD (V)
2.7 to 5.5
TEMP
RANGE (°C)
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
PACKAGE
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld TSSOP (4.4mm)
8 Ld TSSOP (4.4mm) (Pb-free)
PKG. DWG. #
MDP0027
MDP0027
MDP0027
MDP0027
M8.173
M8.173
X1226V8I*
1226I
-40 to 85 8 Ld TSSOP (4.4mm)
M8.173
X1226V8IZ* (Note)
1226IZ
-40 to 85 8 Ld TSSOP (4.4mm) (Pb-free)
M8.173
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN CONFIGURATION
X1
X2
PHZ/IRQ
VSS
8 LD SOIC
18
27
36
45
VCC
VBACK
SCL
SDA
VBACK
VCC
X1
X2
8 LD TSSOP
18
27
36
45
SCL
SDA
VSS
PHZ/IRQ
2 FN8098.3
May 8, 2006

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X1226
PIN ASSIGNMENTS
Pin Number
SOIC TSSOP
13
Symbol
X1
2 4 X2
3 5 PHZ/IRQ
4 6 VSS
5 7 SDA
6 8 SCL
7 1 VBACK
8 2 VCC
Brief Description
X1. The X1pin is the input of an inverting amplifier. An external 32.768kHz quartz
crystal is used with the X1226 to supply a timebase for the real time clock. The
recommended crystal is a Citizen CFS206-32.768KDZF. Internal compensation circuitry is
included to form a complete oscillator circuit. Care should be taken in the placement of the
crystal and the layout of the circuit. Plenty of ground plane around the device and short
traces to X1 are highly recommended. See Application section for more recommendations.
X2. The X2 pin is the output of an inverting amplifier. An external 32.768kHz quartz
crystal is used with the X1226 to supply a timebase for the real time clock. The
recommended crystal is a Citizen CFS206-32.768KDZF. Internal compensation circuitry is
included to form a complete oscillator circuit. Care should be taken in the placement of the
crystal and the layout of the circuit. Plenty of ground plane around the device and short
traces to X2 are highly recommended. See Application section for more recommendations.
Programmable Frequency/Interrupt Output – PHZ/IRQ. This is either an output from
the internal oscillator or an interrupt signal output. It is an open drain output.
When used as frequency output, this signal has a frequency of 32.768kHz, 4096Hz,
1Hz or inactive.
When used as interrupt output, this signal notifies a host processor that an alarm has
occurred and an action is required. It is an active LOW output.
The control bits for this function are FO1 and FO0 and are found in address 0011h of
the Clock Control Memory map. See “Programmable Frequency Output Bits—FO1,
FO0” on page 9.
VSS.
Serial Data (SDA). SDA is a bidirectional pin used to transfer data into and out of the
device. It has an open drain output and may be wire ORed with other open drain or
open collector outputs. The input buffer is always active (not gated).
An open drain output requires the use of a pull-up resistor. The output circuitry controls
the fall time of the output signal with the use of a slope controlled pull-down. The circuit
is designed for 400kHz 2-wire interface speed.
Serial Clock (SCL). The SCL input is used to clock all data into and out of the device.
The input buffer on this pin is always active (not gated).
VBACK. This input provides a backup supply voltage to the device. VBACK supplies
power to the device
battery, a Supercap
in
or
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This
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VCC.
3 FN8098.3
May 8, 2006