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DATASHEET
256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM
X28HC256
The X28HC256 is a second generation high performance
CMOS 32k x 8 EEPROM. It is fabricated with Intersil’s
proprietary, textured poly floating gate technology, providing a
highly reliable 5V only nonvolatile memory.
The X28HC256 supports a 128-byte page write operation,
effectively providing a 24µs/byte write cycle, and enabling the
entire memory to be typically rewritten in less than 0.8s. The
X28HC256 also features DATA polling and Toggle bit polling,
two methods of providing early end of write detection. The
X28HC256 also supports the JEDEC standard software data
protection feature for protecting against inadvertent writes
during power-up and power-down.
Endurance for the X28HC256 is specified as a minimum
100,000 write cycles per byte and an inherent data retention
of 100 years.
Features
• Access time: 90ns
• Simple byte and page write
- Single 5V supply
- No external high voltages or VP-P control circuits
- Self timed
- No erase before write
- No complex programming algorithms
- No overerase problem
• Low power CMOS
- Active: 60mA
- Standby: 500µA
• Software data protection
- Protects data against system level inadvertent writes
• High speed page write capability
• Highly reliable Direct Writecell
- Endurance: 100,000 cycles
- Data retention: 100 years
• Early end of write detection
- DATA polling
- Toggle bit polling
• RoHS compliant
August 27, 2015
FN8108.5
A0 TO A14
ADDRESS
INPUTS
CE
OE
WE
VCC
VSS
X BUFFERS
LATCHES AND
DECODER
256k BIT
EEPROM
ARRAY
Y BUFFERS
LATCHES AND
DECODER
CONTROL
LOGIC AND
TIMING
I/O BUFFERS
AND LATCHES
I/O0 TO I/O7
DATA INPUTS/OUTPUTS
FIGURE 1. BLOCK DIAGRAM
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2005-2007, 2010, 2011, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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X28HC256
Ordering Information
PART NUMBER
(Note 4)
PART MARKING
ACCESS TIME
(ns)
TEMP. RANGE
(°C)
PACKAGE
PKG. DWG. #
X28HC256JZ-15 (Notes 1, 3) X28HC256J-15 ZHY
150
0 to +70
32 Ld PLCC (RoHS Compliant)
N32.45x55
X28HC256JI-15 (Note 1)
X28HC256JI-15 HY
150
-40 to +85 32 Ld PLCC
N32.45x55
X28HC256JIZ-15
(Notes 1, 3)
X28HC256JI-15 ZHY
150
-40 to +85 32 Ld PLCC (RoHS Compliant)
N32.45x55
X28HC256PZ-15
(Notes 2, 3)
X28HC256P-15 HYZ
150
0 to +70
28 Ld PDIP (RoHS Compliant)
E28.6
X28HC256PIZ-15
(Notes 2, 3)
X28HC256PI-15 HYZ
150
-40 to +85 28 Ld PDIP (RoHS Compliant)
E28.6
X28HC256JZ-12 (Notes 1, 3) X28HC256J-12 ZHY
120
0 to +70
32 Ld PLCC (RoHS Compliant)
N32.45x55
X28HC256JI-12 (Note 1)
X28HC256JI-12 HY
120
-40 to +85 32 Ld PLCC
N32.45x55
X28HC256JIZ-12
(Notes 1, 3)
X28HC256JI-12 ZHY
120
-40 to +85 32 Ld PLCC (RoHS Compliant)
N32.45x55
X28HC256PZ-12
(Notes 2, 3)
X28HC256P-12 HYZ
120
0 to +70
28 Ld PDIP (RoHS Compliant)
E28.6
X28HC256PIZ-12
(Notes 2, 3)
X28HC256PI-12 HYZ
120
-40 to +85 28 Ld PDIP (RoHS Compliant)
E28.6
X28HC256SZ-12 (Note 3)
X28HC256S-12 HYZ
120
0 to +70
28 Ld SOIC (300mils RoHS Compliant) MDP0027
X28HC256SI-12
X28HC256SI-12 HY
120
-40 to +85 28 Ld SOIC (300mils)
M28.3
X28HC256SIZ-12 (Note 3) X28HC256SI-12 HYZ
120
-40 to +85 28 Ld SOIC (300mils RoHS Compliant) MDP0027
X28HC256JZ-90 (Notes 1, 3) X28HC256J-90 ZHY
90
0 to +70
32 Ld PLCC (RoHS Compliant)
N32.45x55
X28HC256JI-90 (Note 1)
X28HC256JI-90 HY
90
-40 to +85 32 Ld PLCC
N32.45x55
X28HC256JIZ-90
(Notes 1, 3)
X28HC256JI-90 ZHY
90
-40 to +85 32 Ld PLCC (RoHS Compliant)
N32.45x55
X28HC256PZ-90
(Notes 2, 3)
X28HC256P-90 HYZ
90
0 to +70
28 Ld PDIP (RoHS Compliant)
E28.6
X28HC256PIZ-90 (Notes 2, 3) X28HC256PI-90 HYZ
90
-40 to +85 28 Ld PDIP (RoHS Compliant)
E28.6
X28HC256SI-90
X28HC256SI-90 HY
90
-40 to +85 28 Ld SOIC (300mils)
M28.3
X28HC256SIZ-90 (Note 3) X28HC256SI-90 HYZ
90
-40 to +85 28 Ld SOIC (300mils RoHS Compliant) MDP0027
NOTES:
1. Add “T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see product information page for X28HC256. For more information on MSL, please see tech brief TB363.
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Pin Configurations
X28HC256
(28 LD FLATPACK, PDIP, SOIC)
TOP VIEW
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
X28HC256
X28HC256
(32 LD PLCC, LCC)
TOP VIEW
4 3 2 1 32 31 30
A6 5
A5 6
A4 7
A3 8
29 A8
28 A9
27 A11
26 NC
A2 9
A1 10
A0 11
25 OE
24 A10
23 CE
NC 12
22 I/O7
I/O0
13 21
14 15 16 17 18 19 20
I/O6
Pin Descriptions
PIN NAME
A0, A1, A2, A3, A4, A5,
A6, A7, A8, A9, A10, A11,
A12, A13, A14
I/O0, I/O1, I/O2, I/O3,
I/O4, I/O5, I/O6, I/O7
WE
PIN #
PDIP, SOIC
10, 9, 8, 7, 6, 5,
4, 3, 25, 24, 21, 23,
2, 26, 1
11, 12, 13, 15
16, 17, 18, 19
27
CE 20
OE 22
VCC 28
VSS 14
NC -
PIN #
PLCC, LCC
11, 10, 9, 8, 7, 6,
5, 4, 29, 28, 24, 27,
3, 30, 2
13, 14, 15, 18
19, 20, 21, 22
31
23
25
32
16
1, 12, 17, 26
DESCRIPTION
Addresses (A0 to A14) - Address inputs. The address inputs select
an 8-bit memory location during a read or write operation.
Data In/Data Out (I/O0 to I/O7) - Data input/output- Data is
written to or read from the X28HC256 through the I/O pins.
Write Enable (WE) - The Write enable input controls the writing of
data to the X28HC256.
Chip Enable (CE) - The Chip enable input must be LOW to enable
all read/write operations. When CE is HIGH, power consumption is
reduced.
Output Enable (OE) - The output enable input controls the data
output buffers, and is used to initiate read operations.
+5V
Ground
No Connect
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X28HC256
Absolute Maximum Ratings
Voltage on any Pin with Respect to VSS . . . . . . . . . . . . . . . . . . . . . 1V to +7V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Recommended Operating Conditions
Temperature Range
Commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%
Thermal Information
Temperature Under Bias
X28HC256. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10°C to +85°C
X28HC256I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
*Pb-free PDIPs can be used for through hole wave solder processing only.
They are not intended for use in Reflow solder processing applications.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
DC Electrical Specifications Across recommended operating conditions, unless otherwise specified.
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP
(Note 7) (Note 5)
VCC Active Current
(TTL Inputs)
ICC CE = OE = VIL, WE = VIH, All I/O’s = open,
address inputs = 0.4V/2.4V levels at f = 10MHz
30
VCC Standby Current
(TTL Inputs)
ISB1 CE = VIH, OE = VIL, All I/O’s = open, other inputs = VIH
1
VCC Standby Current
(CMOS Inputs)
ISB2 CE = VCC - 0.3V, OE = GND, All I/Os = open, other
inputs = VCC - 0.3V
200
Input Leakage Current
ILI VIN = VSS to VCC
Output Leakage Current
ILO VOUT = VSS to VCC, CE = VIH
Input Low Voltage
VlL (Note 6)
-1
Input High Voltage
VIH (Note 6)
2
Output Low Voltage
VOL IOL = 6mA
Output High Voltage
VOH IOH = -4mA
2.4
NOTES:
5. Typical values are for TA = +25°C and nominal supply voltage.
6. VIL minimum and VIH maximum are for reference only and are not tested.
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
MAX
(Note 7)
60
2
500
10
10
0.8
VCC + 1
0.4
UNIT
mA
mA
µA
µA
µA
V
V
V
V
Power-up Timing
PARAMETER
SYMBOL
Power-up to Read
tPUR, (Note 8)
Power-up to Write
tPUW, (Note 8)
NOTE:
8. This parameter is periodically sampled and not 100% tested.
MAX
100
5
UNIT
µs
ms
Capacitance TA = +25°C, f = 1MHz, VCC = 5V.
SYMBOL
TEST
CI/O (Note 8)
CIN (Note 8)
Input/output capacitance
Input capacitance
Endurance and Data Retention
Endurance
Data retention
PARAMETER
CONDITIONS
VI/O = 0V
VIN = 0V
MAX
10
6
MIN
100,000
100
MAX
UNIT
pF
pF
UNIT
Cycles
Years
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AC Conditions of Test
Input pulse levels
Input rise and fall times
Input and output timing levels
Mode Selection
CE OE WE
MODE
L LH
Read
LHL
Write
H X X Standby and write
inhibit
X L X Write inhibit
X X H Write inhibit
Equivalent AC Load Circuit
X28HC256
Symbol Table
0V to 3V
5ns
1.5V
WAVEFORM INPUTS
Must be
steady
I/O
DOUT
DIN
High Z
POWER
active
active
standby
——
——
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
5V
1.92k
OUTPUT
1.37k
30pF
FIGURE 2. EQUIVALENT AC LOAD CIRCUIT
AC Electrical Specifications Across recommended operating conditions, unless otherwise specified.
X28HC256-70
X28HC256-90
X28HC256-12
X28HC256-15
PARAMETER
SYMBOL
MIN MAX MIN
MAX MIN MAX MIN
MAX UNIT
Read Cycle Time
tRC 70
90 120 150 ns
Chip Enable Access Time
tCE 70 90 120 150 ns
Address Access Time
tAA 70 90 120 150 ns
Output Enable Access Time
tOE 35 40 50 50 ns
CE LOW to Active Output
tLZ (Note 9)
0
0
0
0 ns
OE LOW to Active Output
tOLZ (Note 9)
0
0
0
0 ns
CE HIGH to High Z Output
tHZ (Note 9)
35
40
50 50 ns
OE HIGH to High Z Output
tOHZ (Note 9)
35
40
50 50 ns
Output Hold from Address Change
tOH 0
0
0
0 ns
NOTE:
9. tLZ minimum, tHZ, tOLZ minimum and tOHZ are periodically sampled and not 100% tested, tHZ and tOHZ are measured with CL = 5pF, from the point
when CE, OE return HIGH (whichever occurs first) to the time when the outputs are no longer driven..
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