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®
Data Sheet
September 22, 2006
ISL6549
FN9168.2
Single 12V Input Supply Dual Regulator —
Synchronous Rectified Buck PWM and
Linear Power Controller
The ISL6549 provides the power control and protection for
two output voltages in high-performance applications. The
dual-output controller drives two N-Channel MOSFETs in a
synchronous rectified buck converter topology and one
N-Channel MOSFET in a linear configuration. The controller is
ideal for applications where regulation of both the processing
unit and memory supplies is required.
The synchronous rectified buck converter incorporates
simple, single feedback loop, voltage-mode control with fast
transient response. Both the switching regulator and linear
regulator provide a maximum static regulation tolerance of
±1% over line, load, and temperature ranges. Each output is
user-adjustable by means of external resistors.
An integrated soft-start feature brings both supplies into
regulation in a controlled manner. Each output is monitored
via the FB pins for undervoltage events. If either output drops
below 75% of the nominal output level, both converters are
shut off and go into retry mode.
The ISL6549 is available in a 14 Ld SOIC package,
16 Ld QSOP, or 16 Ld 4x4 QFN packages.
Related Literature
• Technical Brief TB363 Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
Ordering Information
Features
• Single 12V bias supply (no 5V supply is required)
• Provides two regulated voltages
- One synchronous rectified buck PWM controller
- One linear controller
• Both controllers drive low cost N-Channel MOSFETs
• Small converter size
- Adjustable frequency 150kHz to 1MHz
- Small external component count
• Excellent output voltage regulation
- Both outputs: ±1% over temperature
• 12V down conversion
• PWM and linear output voltage range: down to 0.8V
• Simple single-loop voltage-mode PWM control design
• Fast PWM converter transient response
- High-bandwidth error amplifier
• Undervoltage fault monitoring on both outputs
• Pb-free plus anneal available (RoHS compliant)
Applications
Processor and memory supplies
• ASIC power supplies
• Embedded processor and I/O supplies
• DSP supplies
PART NUMBER
PART MARKING
TEMP. RANGE (°C)
PACKAGE
PKG. DWG. #
ISL6549CB
ISL6549CB
0 to 70
14 Ld SOIC
M14.15
ISL6549CBZ (Note)
6549CBZ
0 to 70
14 Ld SOIC (Pb-free)
M14.15
ISL6549CR
ISL6549CR
0 to 70
16 Ld 4x4 QFN
L16.4x4
ISL6549CRZ (Note)
6549CRZ
0 to 70
16 Ld 4x4 QFN (Pb-free)
L16.4x4
ISL6549CA
ISL6549CA
0 to 70
16 Ld QSOP
M16.15A
ISL6549CAZ (Note)
6549CAZ
0 to 70
16 Ld QSOP (Pb-free)
M16.15A
ISL6549CAZA (Note)
6549CAZ
0 to 70
16 Ld QSOP (Pb-free)
M16.15A
ISL6549IBZ (Note)
6549IBZ
-40 to 85
14 Ld SOIC (Pb-free)
M14.15
ISL6549IRZ (Note)
6549IRZ
-40 to 85
16 Ld 4x4 QFN (Pb-free)
L16.4x4
ISL6549IAZ (Note)
6549IAZ
-40 to 85
16 Ld QSOP (Pb-free)
M16.15A
ISL6549LOW-EVAL1
Evaluation Board 1-5A
ISL6549HI-EVAL1
Evaluation Board up to 20A
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Pinouts
ISL6549 (SOIC)
TOP VIEW
ISL6549
ISL6549 (QFN)
TOP VIEW
ISL6549 (QSOP)
TOP VIEW
BOOT 1
FS_DIS 2
COMP 3
FB 4
LDO_DR 5
LDO_FB 6
GND 7
14 UGATE
13 PHASE
12 PGND
11 LGATE
10 PVCC5
9 VCC5
8 VCC12
16 15 14 13
COMP 1
FB 2
LDO_DR 3
LDO_FB 4
METAL
GND
PAD
(BOTTOM)
12 PGND
11 LGATE
10 PVCC5
9 VCC5
5678
BOOT 1
FS_DIS 2
COMP 3
FB 4
LDO_DR 5
LDO_FB 6
AGND 7
DGND 8
16 UGATE
15 PHASE
14 PGND
13 LGATE
12 PVCC5
11 VCC5
10 VCC12
9 VCC12
Block Diagram
VOLTAGE
REFERENCE
LDO_FB
LDO_DR
EA2
FS_DIS
GND
DIS
OSCILLATOR
UV2
VCC5
POWER-ON
RESET (POR)
VCC12
5V
REGULATOR
SOFT-START
RESTART
INHIBIT
SOFT-START
DIS
EA1
PWM
COMP
GATE
LOGIC
PVCC5
BOOT
UGATE
PHASE
LGATE
UV1
PGND
FB COMP
2 FN9168.2
September 22, 2006

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ISL6549
Simplified Power System Diagram
+VIN1
+12V
+VIN2
VOUT2
+
Q3
LINEAR
CONTROLLER
ISL6549
PWM
CONTROLLER
Q1
VOUT1
+
Q2
Typical Application Schematic
+VIN1
+12V
+VIN2
CVIN2
+
CBP
CBP5
VOUT2
Q3
+ COUT2
CBP12
PVCC5
VCC12
VCC5
LDO_DR
BOOT
UGATE
PHASE
CBOOT
LDO_FB
LGATE
ISL6549
FB
FS_DIS
COMP
GND
PGND
+
CVIN1
Q1
LOUT
Q2
VOUT1
+ COUT1
3 FN9168.2
September 22, 2006

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ISL6549
Absolute Maximum Ratings
VCC12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +14V
PVCC5, VCC5 . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +7V
VCC5 (if used with external supply). . . . . . . . . . . GND - 0.3V to +6V
BOOT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +27V
PHASE. . . . . . . . . . . . . . . . . . . . . . . . VBOOT - 7V to VBOOT + 0.3V
VBOOT - VPHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7V
UGATE. . . . . . . . . . . . . . . . . . . . . . VPHASE - 0.3V to VBOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to PVCC5 + 0.3V
LDO_DR . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC12 + 0.3V
FB, LDO_FB, COMP, FS_DIS . . . . . . . GND - 0.3V to VCC5 + 0.3V
ESD Classification
Human Body Model (Per JESD22-A114C) . . . . . . . . . . . . . . Class 2
Machine Model (Per EIA/JESD22-A115-A) . . . . . . . . . . . . . .Class B
Charge Device Model (Per JESD22-C101C). . . . . . . . . . . . Class IV
Thermal Information
Thermal Resistance
SOIC Package (Note 1) . . . . . . . . . . . .
QFN Package (Notes 2, 3). . . . . . . . . .
QSOP Package (Note 1) . . . . . . . . . . .
θJA (°C/W)
105
52
110
θJC (°C/W)
N/A
14
N/A
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . +300°C
(SOIC - Lead Tips Only)
Recommended Operating Conditions
External Supply Voltage on VCC5 . . . . . . . . . . . . . . . . . . +5.0V ±5%
Supply Voltage on VCC12 . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range (C). . . . . . . . . . . . . . . . . . 0°C to 70°C
Ambient Temperature Range (I) . . . . . . . . . . . . . . . . -40°C to +85°
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0°C to +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, unless otherwise noted. VCC12 = 12V
Temperature = 0 to +70°C (typical = +25°C) for Commercial; Temperature = -40 to + 85°C (typical = +25°C) for
Industrial. Refer to Block Diagram, Simplified Power System Diagram, and Typical Application Schematic.
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply Current VCC12 (disabled)
Nominal Supply Current VCC5 (disabled)
Nominal Supply Current VCC12
(includes PVCC5 current)
Nominal Supply Current VCC5
Maximum PVCC5 Current Available (Note 5)
VCC12 to PVCC5 Current Limit (Note 5)
PVCC5 Voltage
POWER-ON RESET
Rising VCC5 Threshold
Falling VCC5 Threshold
Rising VCC12 Threshold
Falling VCC12 Threshold
OSCILLATOR AND SOFT-START
Switching Frequency
SYMBOL
ICC12 dis
ICC5 dis
ICC12
ICC5
IPVCC5
IPVCC5CL
VPVCC5
FOSC
TEST CONDITIONS
UGATE, LGATE and LDO_DR open;
FS_DIS = GND
UGATE, LGATE and LDO_DR open;
FS_DIS = GND (Note 4)
UGATE, LGATE and LDO_DR open;
FOSC = 620kHz
UGATE, LGATE and LDO_DR open;
FOSC = 620kHz
ISL6549C; No external load
ISL6549I; No external load
VCC12 = 12V
VCC12 = 12V
VCC5 = 5V
VCC5 = 5V
ISL6549C; RFS_DIS = 45.3k
ISL6549I; RFS_DIS = 45.3k
MIN TYP MAX UNITS
2 3 mA
5 7.5 mA
12 18 mA
4 6 mA
100 mA
150 mA
4.95 5.25
5.8
V
4.85 5.25
5.8
3.7 4.2 4.5 V
3.3 3.8 4.1 V
8.8 9.5 10.0 V
7.0 7.5 8.0 V
540 620 700 kHz
525 620 700 kHz
4 FN9168.2
September 22, 2006

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ISL6549
Electrical Specifications
Recommended Operating Conditions, unless otherwise noted. VCC12 = 12V
Temperature = 0 to +70°C (typical = +25°C) for Commercial; Temperature = -40 to + 85°C (typical = +25°C) for
Industrial. Refer to Block Diagram, Simplified Power System Diagram, and Typical Application Schematic.
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Sawtooth Amplitude (Note 6)
Soft-Start Interval
REFERENCE VOLTAGE
DVOSC
TSS
FOSC = 620kHz
1.5 V
6.8 ms
Reference Voltage
VREF
ISL6549C; For Error Amp 1 and 2
ISL6549I; For Error Amp 1 and 2
0.792 0.8 0.808 V
0.788 0.8 0.812 V
PWM CONTROLLER ERROR AMPLIFIER
DC Gain (Note 6)
Gain-Bandwidth Product (Note 6)
Slew Rate (Note 6)
FB Input Current
COMP High Output Voltage
COMP Low Output Voltage
COMP High Output, Source Current
Undervoltage Level (VFB/VREF)
PWM CONTROLLER GATE DRIVERS
GBWP
SR
II
VOUT High
VOUT Low
IOUT High
VUV
RL = 10K, CL = 10pF
RL = 10K, CL = 10pF
RL = 10K, CL = 10pF
VFB = 0.8V
96 dB
20 MHz
8 V/µs
0.1 1.0 µA
4.8 V
0.6 V
-2.8 mA
70 75 80 %
UGATE Maximum Voltage
LGATE Maximum Voltage
UGATE and LGATE Minimum Voltage
UGATE Source Output Impedance
UGATE Sink Output Impedance
LGATE Source Output Impedance
LGATE Sink Output Impedance
LINEAR REGULATOR (LDO_DR)
VHUGATE
VHLGATE
VLGATE
RDS(ON)
RDS(ON)
RDS(ON)
RDS(ON)
VCC12 = 12V; PHASE = 12V
VCC12 = 12V; based on PVCC5 voltage
VCC12 = 12V; PHASE = 0V
VCC12 = 12V; IGATE = 100mA
VCC12 = 12V; IGATE = 100mA
VCC12 = 12V; IGATE = 100mA
VCC12 = 12V; IGATE = 100mA
17 17.5 18
5.25 6
V
0 0.5 V
0.8
0.7
0.8
0.4
DC Gain (Note 6)
Gain
RL = 10K, CL = 10pF
100 dB
Gain-Bandwidth Product (Note 6)
GBWP RL = 10K, CL = 10pF
2 MHz
Slew Rate (Note 6)
SR RL = 10K, CL = 10pF
6 V/µs
LDO_FB Input Current
II VLDO_FB = 0.8V
0.1 1.0 µA
LDO_DR High Output Voltage
VOUT High VCC12 = 12V
11.0 11.5
V
LDO_DR Low Output Voltage
VOUT Low
0.0 0.5 V
LDO_DR High Output Source Current
IOUT High VOUT = 2.0V
2.0 mA
LDO_DR Low Output Sink Current
IOUT Low
0.5 mA
Undervoltage Level (VLDO_FB/VREF)
NOTES:
VUV
Percent of Nominal
70 75 80 %
4. Current in VCC5 is actually higher disabled, due to extra current required to pull down against the FS_DIS pin. VCC12 current is lower disabled.
5. Guaranteed by design, not production tested. Exceeding the maximum current from PVCC5 may result in degraded performance and unsafe
operation.
6. Guaranteed by design, not production tested.
5 FN9168.2
September 22, 2006