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®
Data Sheet
October 31, 2008
ISL6752
FN9181.3
ZVS Full-Bridge Current-Mode PWM with
Adjustable Synchronous Rectifier Control
The ISL6752 is a high-performance, low-pin-count alternative
zero-voltage switching (ZVS) full-bridge PWM controller. Like
Intersil’s ISL6551, it achieves ZVS operation by driving the
upper bridge FETs at a fixed 50% duty cycle while the lower
bridge FETs are trailing-edge modulated with adjustable
resonant switching delays. Compared to the more familiar
phase-shifted control method, this algorithm offers equivalent
efficiency and improved overcurrent and light-load performance
with less complexity in a lower pin count package.
The ISL6752 features complemented PWM outputs for
synchronous rectifier (SR) control. The complemented
outputs may be dynamically advanced or delayed relative to
the PWM outputs using an external control voltage.
This advanced BiCMOS design features precision deadtime
and resonant delay control, and an oscillator adjustable to
2MHz operating frequency. Additionally, Multi-Pulse
Suppression ensures alternating output pulses at low duty
cycles where pulse skipping may occur.
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-free) DWG. #
ISL6752AAZA* ISL 6752AAZ -40 to +105 16 Ld QSOP M16.15A
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Adjustable Resonant Delay for ZVS Operation
• Synchronous Rectifier Control Outputs with Adjustable
Delay/Advance
• Current-Mode Control
• 3% Current Limit Threshold
• Adjustable Deadtime Control
• 175µA Start-up Current
• Supply UVLO
• Adjustable Oscillator Frequency Up to 2MHz
• Internal Over-Temperature Protection
• Buffered Oscillator Sawtooth Output
• Fast Current Sense to Output Delay
• Adjustable Cycle-by-Cycle Peak Current Limit
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Pb-Free (RoHS Compliant)
Applications
• ZVS Full-Bridge Converters
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
Pinout
ISL6752
(16 LD QSOP)
TOP VIEW
VADJ 1
VREF 2
VERR 3
CTBUF 4
RTD 5
RESDEL 6
CT 7
CS 8
16 VDD
15 OUTLL
14 OUTLR
13 OUTUL
12 OUTUR
11 OUTLLN
10 OUTLRN
9 GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Functional Block Diagram
VDD
GND
VREF
RESDEL
UVLO
OVER-
TEMPERATURE
PROTECTION
VREF
CT
RTD
CTBUF
OSCILLATOR
50%
PWM
STEERING
LOGIC
PWM
VDD
DELAY/
ADVANCE
TIMING
CONTROL
OUTUL
OUTUR
OUTLL
OUTLR
OUTLLN
OUTLRN
VADJ
+
- 1.00V
OVERCURRENT
COMPARATOR
70ns
LEADING
EDGE
BLANKING
+
-
PWM
COMPARATOR
80mV
0.33
VREF
1mA
CS
VERR

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Typical Application - High Voltage Input Primary Side Control ZVS Full-Bridge Converter
VIN+
+
C1
400 VDC
CR2
Q8A R10
Q8B
Q1
C8
R1
VIN-
Q6A
Q4 Q6B
T3 CR3
R11
C9
Q5A
Q5B
Q2
Q10A
Q10B
C10
Q9A
Q9B
Q7A Q3
Q7B
T1
R13
C13
CR1
T2
R2
R3
Q11
VDD
C2
VR1
R19
R8
R20
R7
R4
R5 R6
C3 C17 C4
R21
VADJ
VDD
VREF OUTLL
VERR OUTLR
CTBUF OUTUL
RTD OUTUR
RESDEL OUTLLN
CT OUTLRN
CS GND
U1
R23 R24
R22 C16
EL7212
C5
T4
U5
R23
CR4
Q14
C6
R24
U2
Q12
Q13
EL7212
U4
R12
C12
L1
C15
C7 +
+
VOUT
RETURN
R18
R17
R16
C14
C11 R15
U3
R14

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Typical Application - High Voltage Input Secondary Side Control ZVS Full-Bridge Converter
VIN+
Q1
Q5
R13 CR2
T3
1:1:1
Q6
CR3 R12
Q2
400 VDC
+
C1
Q4
Q7A R10
Q7B
CR4
C8
Q10A
Q10B
C10
T4
1:1:1
Q9A
Q9B
CR5
R11
C9
Q8A
Q8B
Q3
Q11A C7 Q12A
Q11B
Q12B
VIN-
CR1
T2
SECONDARY
BIAS
SUPPLY
R1
C2
VREF
R8
R9
R7
R6
VADJ
VDD
VREF OUTLL
VERR OUTLR
CTBUF OUTUL
RTD OUTUR
RESDEL OUTLLN
CT OUTLRN
CS GND
U1
R2 R3
R4
C3 C4 C5
R5
C6
T1
Np:Ns:Ns = 9:2:2
Ns
Np
Ns
Q16
R14
C11
Q15
R15
L1
C12
C13 C14 +
Q13A
Q13B
Q14A
Q14B
R17
C16
VREF
R22
R21
C15 R18
Q17
R16
U3 -
+
C18
R19
C17
R20
+ VOUT
RETURN

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ISL6752
Absolute Maximum Ratings (Note 2)
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTxxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF + 0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . 9VDC to 16VDC
Thermal Information
Thermal Resistance Junction to Ambient (Typical)
θJA (°C/W)
16 Ld QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . . . .
100
Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 2
and “Typical Application - High Voltage Input Primary Side Control ZVS Full-Bridge Converter” on page 3 and
“Typical Application - High Voltage Input Secondary Side Control ZVS Full-Bridge Converter” on page 4.
9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, TA = -40°C to +105°C, Typical values are at TA = +25°C;
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature
limits established by characterization and are not production tested.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE
Supply Voltage
- - 20 V
Start-Up Current, IDD
Operating Current, IDD
UVLO START Threshold
VDD = 5.0V
RLOAD, COUT = 0
-
-
8.00
175
11.0
8.75
400 µA
15.5 mA
9.00 V
UVLO STOP Threshold
6.50 7.00 7.50 V
Hysteresis
- 1.75 - V
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Operational Current (Source)
IVREF = 0mA to 10mA
TA = +125°C, 1000 hours (Note 3)
4.850
-
-10
5.000
3
-
5.150
-
-
V
mV
mA
Operational Current (Sink)
5 - - mA
Current Limit
VREF = 4.85V
-15
-
-100
mA
CURRENT SENSE
Current Limit Threshold
VERR = VREF
0.97 1.00 1.03 V
CS to OUT Delay
Excl. LEB (Note 3)
- 35 50 ns
Leading Edge Blanking (LEB) Duration
(Note 3)
50 70 100 ns
CS to OUT Delay + LEB
CS Sink Current Device Impedance
Input Bias Current
CS to PWM Comparator Input Offset
PULSE WIDTH MODULATOR
TA = +25°C
VCS = 1.1V
VCS = 0.3V
TA = +25°C
- - 130 ns
- - 20 Ω
-6.00
-
-2.00
µA
65 80 95 mV
VERR Pull-Up Current Source
VERR = 2.50V
0.80 1.00 1.30 mA
VERR VOH
Minimum Duty Cycle
ILOAD = 0mA
VERR < 0.6V
4.20
-
-
-
-V
0%
5 FN9181.3
October 31, 2008