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®
Data Sheet
April 4, 2006
ISL6753
FN9182.2
ZVS Full-Bridge PWM Controller
The ISL6753 is a high-performance, low-pin-count
alternative, zero-voltage switching (ZVS) full-bridge PWM
controller. Like the ISL6551, it achieves ZVS operation by
driving the upper bridge FETs at a fixed 50% duty cycle while
the lower bridge FETS are trailing-edge modulated with
adjustable resonant switching delays. Compared to the more
familiar phase-shifted control method, this algorithm offers
equivalent efficiency and improved overcurrent and light-
load performance with less complexity in a lower pin count
package.
This advanced BiCMOS design features low operating
current, adjustable oscillator frequency up to 2MHz,
adjustable soft-start, internal over temperature protection,
precision deadtime and resonant delay control, and short
propagation delays. Additionally, Multi-Pulse Suppression
ensures alternating output pulses at low duty cycles where
pulse skipping may occur.
Ordering Information
PART
NUMBER
PART
TEMP.
PKG.
MARKING RANGE (°C) PACKAGE DWG. #
ISL6753AAZA ISL6753AAZ -40 to 105 16 Ld QSOP M16.15A
(See Note)
(Pb-free)
Add -T suffix to part number for tape and reel packaging
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Pinout
ISL6753 (QSOP)
TOP VIEW
VERR 1
CTBUF 2
RTD 3
RESDEL 4
CT 5
FB 6
RAMP 7
CS 8
16 VREF
15 SS
14 VDD
13 OUTLL
12 OUTLR
11 OUTUL
10 OUTUR
9 GND
Features
• Adjustable Resonant Delay for ZVS Operation
• Voltage- or Current-Mode Operation
• 3% Current Limit Threshold
175µA Startup Current
• Supply UVLO
• Adjustable Deadtime Control
• Adjustable Soft-Start
• Adjustable Oscillator Frequency Up to 2MHz
• Tight Tolerance Error Amplifier Reference Over Line,
Load, and Temperature
• 5MHz GBWP Error Amplifier
• Adjustable Cycle-by-Cycle Peak Current Limit
• Fast Current Sense to Output Delay
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Buffered Oscillator Sawtooth Output
• Internal Over Temperature Protection
• Pb-Free Plus Anneal Available and ELV, WEEE,
RoHS Compliant
Applications
• ZVS Full-Bridge Converters
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Functional Block Diagram
VDD
GND
VREF
RESDEL
UVLO
OVER-
TEMPERATURE
PROTECTION
VREF
CT
RTD
CTBUF
SS
OSCILLATOR
VREF
50%
PWM
STEERING
LOGIC
PWM
+
- 1.00V
OVER CURRENT
COMPARATOR
70 nS
LEADING
EDGE
BLANKING
+
-
PWM
COMPARATOR
80mV
0.33
VREF
1 mA
SOFTSTART
CONTROL
VDD
OUTUL
OUTUR
OUTLL
OUTLR
CS
RAMP
+ 0.6V
-
VERR
FB

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Typical Application - High Voltage Input ZVS Full-Bridge Converter
P1
VIN+
300 - 400
VDC
P2
VIN-
++
C1-C4
33uF
450V
++
R1
4.7k
5%
2512
R2
4.7k
5%
2512
R3
4.7k
5%
2512
Q1
FQB6N50
R13
10.0k
3 Q6
1 BSS138LT1
2
R14
4.99
0805
CR3
SS12
T3
P0544
46
53
8
1
Q4
FQB6N50
7,8
1
2
4
3
Q8
5,6 ZXTDB2M832
Q10
ZXTDB2M832
7,8
1
2
C13
0.1uF
4
3
5,6
BIAS
87
23
1
CR1
BAV70
31
T2
P8205
R5
100k
1206
R4
4.7k
5%
2512
2
Q11
MJD50
3
1
CR2
BAT54C
1
C5
0.1uF
23
3
1
VR1
BZX84-C12
R6
5.11k
R7A, B
18.7
0805
R8
45.3k
R11
3.65k
R9
499
U1
ISL6753
VERR
VREF
CTBUF
SS
RTD
RESDEL
CT
VDD
OUTLL
OUTLR
FB1 OUTUL
RAMP
OUTUR
CS GND
R12
20.0k
C6
180pF
5% COG
R10
10.0k
C7
47pF
C8
1.0nF
Q5
BSS138LT1
3
1
2
CR4
SS12
R15
4.99
0805
7,8
2
1 Q9
ZXTDB2M832
4
3
5,6
Q2
FQB6N50
R16
10.0k
C17
100pF
250V
COG
R18
10
5%
2512
T1 15, 16
2, 3
Ns
Np
6, 7
13, 14
11, 12
Ns
9, 10
2 1,C
CR5
CSD10060G
CR6
CSD10060G
2 1,C
C12
1.0uF
R17
10.0
7,8
1
2
4
3
5,6
Q7
ZXTDB2M832
Q3
FQB6N50
C22
4700pF
250VAC
SAFETY
C16
100pF
250V
C23 COG
4700pF
250VAC
SAFETY
R19
10
2512
L1
PB2020.103
C18
1uF
100V
1210
C19
1uF
100V
1210
+
C20
470uF
63V
+ C21
470uF
63V
P4
RETURN
R28
10.0k
2512
P3
+ Vout
(48V@10A)
U2
PS2701-1P
41
32
R21
3.74k
1206
R22
3.74k
1206
R20
499
R25
37.4k
0805
CR7
BAT54
31
2
C15
220pF
R27
10.0k
0805
R26
10.0k
0805
C14
4.7nF
R24
100k
R29
20.0k
C9
0.47uF
C10
0.1uF
C11
0.1uF
R30
20.0k
VR2
BZX84-C6V8
3
1
1
U3
3
2
R23
1.10k

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ISL6753
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTxxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF + 0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W)
16 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . .
95
Maximum Junction Temperature . . . . . . . . . . . . . . . . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(QSOP- Lead Tips Only)
Operating Conditions
Temperature Range
ISL6753AAxx . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9-16 VDC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0k, CT = 470pF, TA = -40°C to 105°C (Note 3), Typical values are at
TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE
Supply Voltage
- - 20 -
Start-Up Current, IDD
VDD = 5.0V
-
175 400
µA
Operating Current, IDD
UVLO START Threshold
RLOAD, COUT = 0
- 11.0 15.5
8.00 8.75 9.00
mA
V
UVLO STOP Threshold
6.50 7.00 7.50
V
Hysteresis
- 1.75 -
V
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Operational Current (source)
IVREF = 0 - -10mA
TA = 125°C, 1000 hours (Note 4)
4.850
-
-10
5.000
3
-
5.150
-
-
V
mV
mA
Operational Current (sink)
5 - - mA
Current Limit
VREF = 4.85V
-15
-
-100
mA
CURRENT SENSE
Current Limit Threshold
VERR = VREF
0.97 1.00 1.03
V
CS to OUT Delay
Excl. LEB (Note 4)
- 35 50 ns
Leading Edge Blanking (LEB) Duration
(Note 4)
50 70 100 ns
CS to OUT Delay + LEB
CS Sink Current Device Impedance
Input Bias Current
RAMP
TA = 25°C
VCS = 1.1V
VCS = 0.3V
- - 130 ns
- - 20
-1.0 - 1.0 µA
RAMP Sink Current Device Impedance
RAMP to PWM Comparator Offset
VRAMP = 1.1V
TA = 25°C
- - 20
65 80 95 mV
4 FN9182.2
April 4, 2006

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ISL6753
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0k, CT = 470pF, TA = -40°C to 105°C (Note 3), Typical values are at
TA = 25°C (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Bias Current
Clamp Voltage
VRAMP = 0.3V
(Note 4)
-5.0 - -2.0 µA
6.5 - 8.0 V
PULSE WIDTH MODULATOR
Minimum Duty Cycle
VERR < 0.6V
- - 0%
Maximum Duty Cycle (per half-cycle)
VERR = 4.20V, VRAMP = 0V,
VCS = 0V (Note 5)
RTD = 2.00k, CT = 220pF
- 94 - %
- 97 - %
Zero Duty Cycle VERR Voltage
VERR to PWM Comparator Input Offset
VERR to PWM Comparator Input Gain
Common Mode (CM) Input Range
ERROR AMPLIFIER
Input Common Mode (CM) Range
GBWP
VERR VOL
VERR VOH
VERR Pull-Up Current Source
EA Reference
EA Reference + EA Input Offset Voltage
OSCILLATOR
Frequency Accuracy, Overall
Frequency Variation with VDD
Temperature Stability
Charge Current
Discharge Current Gain
CT Valley Voltage
CT Peak Voltage
CT Pk-Pk Voltage
RTD Voltage
RESDEL Voltage Range
CTBUF Gain (VCTBUFp-p/VCTp-p)
CTBUF Offset from GND
CTBUF VOH
RTD = 2.00k, CT = 470pF
TA = 25°C
(Note 4)
-
0.85
0.7
0.31
0
(Note 4)
(Note 4)
ILOAD = 2mA
ILOAD = 0mA
VERR = 2.5V
TA = 25°C
0
5
-
4.20
0.8
0.594
0.590
(Note 4)
TA = 25°C, (F20V- - F10V)/F10V
VDD = 10V, |F-40°C - F0°C|/F0°C
|F0°C - F105°C|/F25°C
(Note 4)
TA = 25°C
Static Threshold
Static Threshold
Static Value
VCT = 0.8V, 2.6V
VCT = 0.8V
V(ILOAD = 0mA, ILOAD = -2mA),
VCT = 2.6V
165
-10
-
-
-
-193
19
0.75
2.75
1.92
1.97
0
1.95
0.34
-
99
-
0.8
0.33
-
-
-
-
-
1.0
0.600
0.600
183
-
0.3
4.5
1.5
-200
20
0.80
2.80
2.00
2.00
-
2.0
0.40
-
-
1.20
0.9
0.35
VSS
VREF
-
0.4
-
1.3
0.606
0.612
201
+10
1.7
-
-
-207
23
0.88
2.88
2.05
2.03
2
2.05
0.44
0.10
%
V
V
V/V
V
V
MHz
V
V
mA
V
V
kHz
%
%
%
%
µA
µA/µA
V
V
V
V
V
V/V
V
V
5 FN9182.2
April 4, 2006