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®
Data Sheet
January 17, 2007
ISL6257
FN9288.2
Highly Integrated Narrow VDC Battery
Charger for Notebook Computers
The ISL6257 is a highly integrated battery charger controller
for Li-Ion/Li-Ion polymer batteries. ISL6257 is designed for
Narrow VDC applications where the system power source is
either the battery pack or the regulated output of the charger.
This makes the max voltage to the system equal to the max
battery voltage instead of the max adapter voltage. Operating
at lower system voltage can improve overall efficiency. High
efficiency is achieved in the charger with a synchronous buck
topology. The low-side MOSFET emulates a diode at light
loads to improve the light load efficiency and prevent system
bus boosting.
The constant output voltage can be selected for 2, 3 and 4
series Li-Ion cells with ±0.5% accuracy over temperature. It
can also be programmed between 4.2V + 5% per cell and
4.2V - 5% per cell to optimize battery capacity. When
supplying the load and battery charger simultaneously, the
input current limit for the AC adapter is programmable to
within ±3% accuracy to avoid overloading the AC adapter and
to allow the system to make efficient use of available adapter
power for charging. It also has a wide range of programmable
charging current. The ISL6257 automatically transitions from
regulating current mode to regulating voltage mode.
Ordering Information
PART
NUMBER
(Notes 1, 2)
PART
TEMP
PACKAGE PKG.
MARKING RANGE (°C) (Pb-free) DWG. #
ISL6257HRZ ISL6257HRZ -10 to +100 28 Ld 5x5 QFN L28.5×5
ISL6257HRZ-T ISL6257HRZ -10 to +100 28 Ld 5x5 QFN L28.5×5
Tape & Reel
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• ±0.5% Charge Voltage Accuracy (-10°C to +100°C)
• ±3% Accurate Input Current Limit
• ±3% Accurate Battery Charge Current Limit
• ±25% Accurate Battery Trickle Charge Current Limit
• Programmable Charge Current Limit, Adapter Current
Limit and Charge Voltage
• Fixed 300kHz PWM Synchronous Buck Controller with
Diode Emulation at Light Load
• AC Adapter Present Indicator
• Fast Input Current Limit Response
• Input Voltage Range 7V to 25V
• Support 2, 3 and 4 Cells Battery Pack
• Up to 17.64V Battery-Voltage Set Point
• Control Adapter Power Source Select MOSFET
• Thermal Shutdown
• Aircraft Power Capable
• DC Adapter Present Indicator
• Battery Discharge MOSFET Control
• Less than 10µA Battery Leakage Current
• Support Pulse Charging
• Charge any Battery Chemistry: Li-Ion, NiCd, NiMH, etc.
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Notebook, Desknote and Sub-notebook Computers
• Personal Digital Assistant
Pinout
ISL6257 (28 LD QFN)
TOP VIEW
28 27 26 25 24 23 22
EN 1
21 CSOP
CELLS 2
20 CSIN
ICOMP 3
19 CSIP
VCOMP 4
18 SGATE
FB 5
VREF 6
17 BGATE
16 PHASE
CHLIM 7
15 UGATE
8 9 10 11 12 13 14
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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ISL6257
Absolute Maximum Ratings
DCIN, CSIP, CSON to GND. . . . . . . . . . . . . . . . . . . . . -0.3V to +28V
CSIP-CSIN, CSOP-CSON . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
CSIP-SGATE, CSIP-BGATE . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
PHASE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 30V
BOOT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +35V
BOOT to VDDP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to 28V
ACLIM, ACPRN, CHLIM, DCPRN, VDD to GND. . . . . . . -0.3V to 7V
BOOT-PHASE, VDDP-PGND . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
ACSET and DCSET to GND (Note 1) . . . . . . . -0.3V to VDD + 0.3V
FB, ICOMP, VCOMP to GND. . . . . . . . . . . . . . -0.3V to VDD + 0.3V
VREF, CELLS to GND . . . . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V
EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V
UGATE. . . . . . . . . . . . . . . . . . . . . . . . PHASE-0.3V to BOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . . . . PGND-0.3V to VDDP + 0.3V
PGND to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 2, 3). . . . . . . . . .
39
9.5
QSOP Package (Note 2) . . . . . . . . . . .
80
NA
Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C
Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. ACSET and DCSET may be operated 1V below GND if the current through ACSET and DCSET is limited to less than 1mA.
2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF,
VADJ = Floating, EN = VDD = 5V, BOOT - PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA,
TA = -10°C to +100°C, TJ ≤ +125°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY AND BIAS REGULATOR
DCIN Input Voltage Range
7 25 V
DCIN Quiescent Current
EN = VDD or GND, 7V DCIN 25V
1.4 3 mA
Battery Leakage Current (Note 4)
DCIN = 0, no load
3 10 µA
VDD Output Voltage/Regulation
VDD Undervoltage Lockout Trip Point
7V DCIN 25V, 0 IVDD 30mA
VDD Rising
4.925
4.0
5.075
4.4
5.225
4.6
V
V
Hysteresis
150 250 400 mV
Reference Output Voltage VREF
FB Feedback Voltage
0 IVREF 300µA
2.365
2.065
2.39 2.415
2.1 2.12
V
V
Battery Charge Voltage Accuracy
CSON = 16.8V, CELLS = VDD, VADJ = Float
-0.5
0.5 %
CSON = 12.6V, CELLS = GND, VADJ = Float
-0.5
0.5 %
CSON = 8.4V, CELLS = Float, VADJ = Float
-0.5
0.5 %
CSON = 17.64V, CELLS = VDD, VADJ = VREF
-0.5
0.5 %
CSON = 13.23V, CELLS = GND, VADJ = VREF
-0.5
0.5 %
CSON = 8.82V, CELLS = Float, VADJ = VREF
-0.5
0.5 %
CSON = 15.96V, CELLS = VDD, VADJ = GND
-0.5
0.5 %
CSON = 11.97V, CELLS = GND, VADJ = GND
-0.5
0.5 %
CSON = 7.98V, CELLS = Float, VADJ = GND
-0.5
0.5 %
TRIP POINTS
ACSET Threshold
1.24 1.26 1.28 V
ACSET Input Bias Current Hysteresis
2.2 3.4 4.4 µA
ACSET Input Bias Current
ACSET 1.26V
2.2 3.4 4.4 µA
2 FN9288.2
January 17, 2007

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ISL6257
Electrical Specifications
DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF,
VADJ = Floating, EN = VDD = 5V, BOOT - PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA,
TA = -10°C to +100°C, TJ ≤ +125°C, unless otherwise noted. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ACSET Input Bias Current
ACSET < 1.26V
-1 0 1 µA
DCSET Threshold
1.24 1.26 1.28 V
DCSET Input Bias Current Hysteresis
2.2 3.4 4.4 µA
DCSET Input Bias Current
DCSET 1.26V
2.2 3.4 4.4 µA
DCSET Input Bias Current
DCSET < 1.26V
-1 0 1 µA
OSCILLATOR
Frequency
245 300 355 kHz
PWM Ramp Voltage (peak-peak)
CSIP = 18V
1.6 V
CSIP = 11V
1V
SYNCHRONOUS BUCK REGULATOR
Maximum Duty Cycle
97 99 99.6 %
UGATE Pull-Up Resistance
BOOT - PHASE = 5V, 500mA source current
1.8 3.0 Ω
UGATE Source Current
BOOT - PHASE = 5V, BOOT-UGATE = 2.5V
1.0
A
UGATE Pull-Down Resistance
BOOT - PHASE = 5V, 500mA sink current
1.0 1.8 Ω
UGATE Sink Current
BOOT - PHASE = 5V, UGATE - PHASE = 2.5V
1.8
A
LGATE Pull-Up Resistance
VDDP - PGND = 5V, 500mA source current
1.8 3.0 Ω
LGATE Source Current
VDDP - PGND = 5V, VDDP - LGATE = 2.5V
1.0 A
LGATE Pull-Down Resistance
VDDP - PGND = 5V, 500mA sink current
1.0 1.8 Ω
LGATE Sink Current
VDDP - PGND = 5V, LGATE = 2.5V
1.8 A
Dead Time
Falling UGATE to rising LGATE or
falling LGATE to rising UGATE
10
30 ns
CHARGING CURRENT SENSING AMPLIFIER
Input Common-Mode Range
0 18 V
Input Offset Voltage
Guaranteed by design
-1.5 0 1.5 mV
Input Bias Current at CSOP
5 < CSOP < 18V
0.25 2 µA
Input Bias Current at CSON
5 < CSON < 18V
50 100 µA
CHLIM Input Voltage Range
0 3.6 V
CSOP to CSON Full-Scale Current Sense
Voltage
CHLIM = 3.3V (4V<CSON<16.8V)
CHLIM = 2.0V (4V<CSON<16.8V)
160 165 170 mV
97 100 103 mV
CHLIM = 0.6V (4V<CSON<16.8V)
28.5 30.0 31.5 mV
CHLIM = 0.2V (4V<CSON<16.8V)
7.5 10 12.5 mV
CHLIM Input Bias Current
CHLIM = GND or 3.3V, DCIN = 0V
-1
1 µA
CHLIM Power-Down Mode Threshold
Voltage
CHLIM rising
80 88 95 mV
CHLIM Power-Down Mode Hysteresis
Voltage
15 25 40 mV
ADAPTER CURRENT SENSING AMPLIFIER
Input Common-Mode Range
7 25 V
Input Offset Voltage
Guaranteed by design
-1.5 1.5 mV
Input Bias Current at CSIP and CSIN
Combined
CSIP = CSIN = 25V
100 130 µA
3 FN9288.2
January 17, 2007

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ISL6257
Electrical Specifications
DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF,
VADJ = Floating, EN = VDD = 5V, BOOT - PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA,
TA = -10°C to +100°C, TJ ≤ +125°C, unless otherwise noted. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Bias Current at CSIN
0 < CSIN < DCIN, Guaranteed by design
0.10 1 µA
ADAPTER CURRENT LIMIT THRESHOLD
CSIP to CSIN Full-Scale Current Sense
Voltage
ACLIM = VREF
ACLIM = Float
97 100 103 mV
72 75 78 mV
ACLIM = GND
47 50 53 mV
ACLIM Input Bias Current
ACLIM = VREF
10 16 20 µA
ACLIM = GND
-20 -16 -10 µA
VOLTAGE REGULATION ERROR AMPLIFIER
Error Amplifier Transconductance from VFB
to VCOMP
240 µA/V
CURRENT REGULATION ERROR AMPLIFIER
Charging Current Error Amplifier
Transconductance
from VCA2 to ICOMP
50 µA/V
Adapter Current Error Amplifier
Transconductance
from VCA1 to ICOMP
50 µA/V
BATTERY CELL SELECTOR
CELLS Input Voltage for 4 Cell Select
4.3 V
CELLS Input Voltage for 3 Cell Select
2V
CELLS Input Voltage for 2 Cell Select
2.1 4.2 V
MOSFET DRIVER
BGATE Pull-Up Current
CSIP - BGATE = 3V
10 30 45 mA
BGATE Pull-Down Current
CSIP - BGATE = 5V
2.7 4.0 5.0 mA
CSIP - BGATE Voltage High
8 9.6 11 V
CSIP - BGATE Voltage Low
-50 0 50 mV
DCIN - CSON Threshold for CSIP-BGATE DCIN = 12V, CSON Rising
Going High
-100 0 100 mV
DCIN - CSON Threshold Hysteresis
250 300 400 mV
SGATE Pull-Up Current
CSIP - SGATE = 3V
7 12 15 mA
SGATE Pull-Down Current
CSIP - SGATE = 5V
50 160 370 µA
CSIP - SGATE Voltage High
8 9 11 V
CSIP - SGATE Voltage Low
-50 0 50 mV
CSIP - CSIN Threshold for CSIP - SGATE
Going High
2.5 8 13 mV
CSIP - CSIN Threshold Hysteresis
1.3 5 8 mV
LOGIC INTERFACE
EN Input Voltage Range
0
VDD
V
EN Threshold Voltage
Rising
1.030
1.06 1.100
V
Falling
0.985
1.000
1.025
V
Hysteresis
30 60 90 mV
EN Input Bias Current
EN = 2.5V
1.8 2.0 2.2 µA
ACPRN Sink Current
ACPRN = 0.4V
3 8 11 mA
ACPRN Leakage Current
ACPRN = 5V
-0.5 0.5 µA
4 FN9288.2
January 17, 2007

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ISL6257
Electrical Specifications
DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF,
VADJ = Floating, EN = VDD = 5V, BOOT - PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA,
TA = -10°C to +100°C, TJ ≤ +125°C, unless otherwise noted. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DCPRN Sink Current
DCPRN = 0.4V
3 8 11 mA
DCPRN Leakage Current
DCPRN = 5V
-0.5 0.5 µA
CSON to GND resistance
CSON = 12.6V
315 380 485 kΩ
Thermal Shutdown Temperature
150 °C
Thermal Shutdown Temperature Hysteresis
25 °C
NOTE:
4. This is the sum of currents in these pins (CSIP, CSIN, BGATE, BOOT, UGATE, PHASE, CSOP, CSON) all tied to 16.8V. No current in pins EN,
ACSET, DCSET, VADJ, CELLS, ACLIM, CHLIM.
Typical Operating Performance DCIN = 20V, 4S2P Li-Battery, TA = +25°C, unless otherwise noted.
0.6 0.10
0.08
0.3
0.06
0.0
0.04
-0.3
0.02
-0.6
0
5 10 15
LOAD CURRENT (mA)
20
FIGURE 1. VDD LOAD REGULATION
40
0.00
0
100 200 300
LOAD CURRENT (μA)
FIGURE 2. VREF LOAD REGULATION
400
10
9
8
7
6
5
4
3
2
1
0
0
10 20 30 40 50 60 70 80 90 100
CSIP-CSIN (mV)
FIGURE 3. ACCURACY vs AC ADAPTER CURRENT
100
96
92
VCSON = 8.4V
2 CELLS
88
VCSON = 12.6V
3 CELLS
84 VCSON = 16.8V
4 CELLS
80
76
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
FIGURE 4. SYSTEM EFFICIENCY vs CHARGE CURRENT
5 FN9288.2
January 17, 2007