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TM
Data Sheet
October 2001
ISL6440A
File Number 9041
Advanced PWM and Triple Linear Power
Controller for Gateway Applications
The ISL6440A provides the power control and protection for
four output voltages required by microprocessors used in
high-performance, graphics-intensive gateway applications.
The IC integrates a voltage-mode PWM controller and three
linear controllers, as well as the monitoring and protection
functions into a 28 lead SOIC package.
The synchronous rectified buck converter includes an Intel®-
compatible, TTL five-input, digital-to-analog converter (DAC)
that adjusts the core PWM output voltage from 1.3VDC to
2.05VDC in 0.05V steps and from 2.1VDC to 3.5VDC in 0.1V
increments. The precision reference and voltage-mode
control provide ±1% static regulation. A TTL-compatible
signal applied to the SELECT pin dictates which method of
control is used for the AGP bus power. A low state results in
linear control of the AGP bus to 1.5V, while a high state
transitions the output through a linearly controlled soft-start
to 3.3V, followed by full enhancement of the external
MOSFET to pass the input voltage. The other two linear
regulators provide fixed output voltages of 1.5V GTL bus
power and 1.8V power for the north/south bridge core and/or
cache memory. These levels are user-adjustable by means
of an external resistor divider and pulling the FIX pin low. All
linear controllers can employ either N-Channel MOSFETs or
bipolar NPNs for the pass transistor.
The ISL6440A monitors all the output voltages. A single
power good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under-
voltage levels. Additional built-in overvoltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controller’s overcurrent function monitors the output current
by using the voltage drop across the upper MOSFET’s
rDS(ON).
Ordering Information
PART NUMBER
ISL6440ACB
TEMP.
RANGE (oC)
PACKAGE
0 to 70 28 Ld SOIC
PKG.
NO.
M28.3
Features
• Provides four regulated voltages
- Microprocessor core, AGP bus, memory, and GTL bus
power
• Drives N-Channel MOSFETs
• Linear regulator drives compatible with both MOSFET and
bipolar series pass transistors
• Fixed or externally resistor-adjustable linear outputs
• Simple single-loop control design
- Voltage-mode PWM control
• Fast PWM converter transient response
- High-bandwidth error amplifier
- Full 0–100% duty ratio
• Excellent output voltage regulation
- Core PWM output: ±1% over temperature
- Other outputs: ±3% over temperature
• TTL-compatible 5-bit DAC core output voltage selection
- Shutdown feature removed when all inputs high
- Wide range 1.3VDC to 3.5VDC
• Power-good output voltage monitor
• Overvoltage and overcurrent fault monitors
- Switching regulator does not require extra current
Sensing element, uses upper MOSFET’s rDS(ON)
• Small converter size
- Constant frequency operation
- 200kHz free-running oscillator; programmable from
50kHz to over 1MHz
- Small external component count
Applications
• Power regulation for gateway processors
Pinout
ISL6440A (SOIC)
TOP VIEW
DRIVE2 1
FIX 2
VID4 3
VID3 4
VID2 5
VID1 6
VID0 7
PGOOD 8
SD 9
VSEN2 10
SELECT 11
SS 12
FAULT/RT 13
VSEN4 14
28 VCC
27 UGATE
26 PHASE
25 LGATE
24 PGND
23 OCSET
22 VSEN1
21 FB
20 COMP
19 VSEN3
18 DRIVE3
17 GND
16 VAUX
15 DRIVE4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001. All Rights Reserved
Intel® is a registered trademark of Intel Corporation.

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Block Diagram
ISL6440A
2

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Simplified Power System Diagram
+5VIN
+3.3VIN
VOUT2
Q3
VOUT3
Q4
ISL6440A
LINEAR
CONTROLLER
PWM
CONTROLLER
ISL6440A
LINEAR
CONTROLLER
LINEAR
CONTROLLER
Q1
VOUT1
Q2
Q5 VOUT4
Typical Application
+12VIN
+5VIN
LIN
CIN
VCC
+3.3VIN
VOUT2
1.5V OR 3.3VIN
TYPEDET
VOUT3
1.5V
COUT3
VOUT4
1.8V
COUT4
Q3
COUT2
Q4
DRIVE2
VSEN2
SELECT
VAUX
DRIVE3
VSEN3
ISL6440A
FIX
Q5 DRIVE4
VSEN4
CSS
SS
GND
OCSET
PGOOD
UGATE
PHASE
LGATE
PGND
VSEN1
FB
COMP
POWERGOOD
Q1
LOUT1
VOUT1
1.3V TO 3.5V
Q2 COUT1
FAULT / RT
VID0
VID1
VID2
VID3
VID4
3

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ISL6440A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
PGOOD, RT/FAULT, DRIVE, PHASE,
and GATE Voltage . . . . . . . . . . . . . . . . GND -0.3V to VCC + 0.3V
Input, Output or I/O Voltage . . . . . . . . . . . . . . . . . . GND -0.3V to 7V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Supply Voltage, VCC . . . . . .
Ambient Temperature Range
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+12V
0oC to
±7100o%C
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
45
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Nominal Supply Current
ICC UGATE, LGATE, DRIVE2, DRIVE3, and
DRIVE4 Open
-9-
mA
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Rising VAUX Threshold
VAUX Threshold Hysteresis
Rising VOCSET Threshold
OSCILLATOR
VOCSET = 4.5V
VOCSET = 4.5V
VOCSET = 4.5V
VOCSET = 4.5V
- - 10.4
8.2 -
-
- 2.5 -
- 0.5 -
- 1.26 -
V
V
V
V
V
Free Running Frequency
Total Variation
FOSC
RT = OPEN
6k< RT to GND < 200k
185 200 215
-15 - +15
kHz
%
Ramp Amplitude
DAC AND BANDGAP REFERENCE
VOSC RT = Open
- 1.9 -
VP-P
DAC(VID0-VID4) Input Low Voltage
- - 0.8 V
DAC(VID0-VID4) Input High Voltage
2.0 -
-
V
DACOUT Voltage Accuracy
-1.0 - +1.0
%
Bandgap Reference Voltage
Bandgap Reference Tolerance
VBG
- 1.265 -
-2.5 - +2.5
V
%
LINEAR REGULATORS (OUT2, OUT3, AND OUT4)
Regulation (All Linears)
Except OUT2 when SELECT > 2.0V
-3-
%
VSEN2 Regulation Voltage
VSEN3 Regulation Voltage
VSEN4 Regulation Voltage
Undervoltage Level (VSEN/VREG)
Undervoltage Hysteresis (VSEN/VREG)
VREG2
VREG3
VREG4
VSENUV
SELECT < 0.8V
VSEN Rising
VSEN Falling
- 1.5 -
- 1.5 -
- 1.8 -
- 75 -
-7-
V
V
V
%
%
Output Drive Current (All Linears)
VAUX-VDRIVE > 0.6V
SYNCHRONOUS PWM CONTROLLER ERROR AMPLIFIER
20 40
-
mA
4

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ISL6440A
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
DC Gain
- 88 -
dB
Gain-Bandwidth Product
GBWP
- 15 - MHz
Slew Rate
SR COMP = 10pF
- 6 - V/µs
PWM CONTROLLER GATE DRIVER
UGATE Source
UGATE Sink
LGATE Source
LGATE Sink
PROTECTION
IUGATE
RUGATE
ILGATE
RLGATE
VCC = 12V, VUGATE = 6V
VGATE-PHASE = 1V
VCC = 12V, VLGATE = 1V
VLGATE = 1V
-1-
- 1.7 3.5
-1-
- 1.4 3.0
A
A
VSEN1 Overvoltage (VSEN1/DACOUT)
VSEN1 Rising
- 115 120
%
FAULT Sourcing Current
OCSET1 Current Source
Soft-Start Current
POWER GOOD
IOVP
IOCSET
ISS
VFAULT/RT = 2.0V
VOCSET = 4.5VDC
- 8.5 -
170 200 230
- 28 -
mA
µA
µA
VSEN1 Upper Threshold
(VSEN1/DACOUT)
VSEN1 Rising
108 - 110
%
VSEN1 Undervoltage
(VSEN1/DACOUT)
VSEN1 Rising
92 - 94
%
VSEN1 Hysteresis (VSEN1/DACOUT)
Upper/Lower Threshold
-2-
%
PGOOD Voltage Low
VPGOOD IPGOOD = -4mA
- - 0.8 V
Typical Performance Curve
1000
100
RT PULLUP
TO +12V
10
RT PULLDOWN TO VSS
10 100
SWITCHING FREQUENCY (kHz)
FIGURE 1. RT RESISTANCE vs FREQUENCY
1000
5