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Freescale Semiconductor
Technical Data
Integrated Quad Half-bridge and
Triple High Side with Embedded
MCU and LIN for High End
Mirror
The 908E621 is an integrated single package solution that
includes a high performance HC08 microcontroller with a
SMARTMOS analog control IC. The HC08 includes flash memory, a
timer, enhanced serial communications interface (ESCI), a 10 bit
analog-to-digital converter (ADC), internal serial peripheral interface
(SPI), and an internal clock generator module (ICG). The analog
control die provides four half-bridge and three high side outputs with
diagnostic functions, a Hall effect sensor input, analog inputs, voltage
regulator, window watchdog, and local interconnect network (LIN)
physical layer.
The single package solution, together with LIN, provides optimal
application performance adjustments and space saving PCB design.
It is well-suited for the control of automotive high end mirrors.
Features
• High performance M68HC908EY16 core
• 16 KB of on-chip flash memory, 512 B of RAM
• Two 16-bit, two-channel timers
• LIN physical layer interface
• Autonomous MCU watchdog / MCU supervision
• One analog input with switchable current source
• Four low RDS(ON) half-bridge outputs
• Three low RDS(ON) high side outputs
• Wake-up and 2 or 3-pin Hall effect sensor input
• 12 microcontroller I/Os
• Pb-free packaging designated by suffix codes EK
Document Number: MM908E621
Rev. 6.0, 4/2012
908E621
QUAD HALF-BRIDGE AND TRIPLE HIGH SIDE
SWITCH WITH EMBEDDED MCU AND LIN
EK (Pb-Free)
98ASA10712D
54-PIN SOICW-EP
ORDERING INFORMATION
Device
(Add an R2 suffix for
Tape and reel orders)
Temperature
Range (TA)
Package
MM908E621ACPEK
-40 to 85°C 54 SOICW-EP
100 nF
4.7 μF
μC PortA
μC PortB
μC PortC
μC PortD
μC PortE
Internally Connected
Internally Connected
LIN VSP1:8]
VDDA/VREFH
L0
EVDD
VDD
HB1
VSSA/VREFL
EVSS
VSS
908E621
HB2
HB3
RST A
RST
HB4
IRQ A
IRQ
HS1
PTA/KBD0
PTA1/KBD1
HS2
PTA2/KBD2
PTA3/KBD3
HS3
PTA4/KBD4
HVDD
PTB3/AD3
A0
PTB4/AD4
PTB5/AD5
A0CST
PTC2/MCLK
H0
PTC3/OSC2
PTC4/OSC1
TESTMODE
PTD0/TACH0
PTD1/TACH1
PTE1/RXD
EP
GND[1:4]
>22 μF
Wake-up Input
100 nF
M
M 4 x Half-brideOutputs
M
High Side Output 1
High Side Output 2
High Side Output 3
Switched 5.0 V Output
Analog Input with Curet Source
Analog Input Current Source Trim
Two 3-pin Hall Sensor Input
Pull to GND for User Mode
Figure 1. 908E621 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2007-2012. All rights reserved.

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INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
GND[1:4]
VSUP[1:8]
TESTMODE
LIN
RST_A
IRQ_A
PTE1/RXD
PTD0/TACH0
IRQ
RST
VSSA/VREFL
EVSS
EVDD
VDDA/VREFH
908E621
2
Internal Bus
PORT C PORT D PORT E
DDRC DDRD DDRE
DDRA
PORT A
DDRB
PORT B
Analog Integrated Circuit Device Data
Freescale Semiconductor

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PIN CONNECTIONS
PIN CONNECTIONS
Transparent Top
View of Package
PTC4 /OSC1
PTC3 /OSC2
PTC2 / MCLK
PTB5 /AD5
PTB4 /AD4
PTB3 /AD3
IRQ
RST
(PTD0/TACH0/BEMF -> PWM)
PTD1/TACH1
RST_A
IRQ_A
LIN
A0CST
A0
GND1
HB4
VSUP1
GND2
HB3
VSUP2
NC
NC
TESTMODE
GND3
HB2
VSUP3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Exposed
Pad
54 PTA0/KBD0
53 PTA1/KBD1
52 PTA2/KBD2
51 FLSVPP
50 PTA3/KBD3
49 PTA4/KBD4
48 VDDA/VREFH
47 EVDD
46 EVSS
45 VSSA/VREFL
44 (PTE1/RXD <- RXD)
43 VSS
42 VDD
41 HVDD
40 L0
39 H0
38 HS3
37 VSUP8
36 HS2
35 VSUP7
34 HS1b
33 HS1a
32 VSUP6
31 VSUP5
30 GND4
29 HB1
28 VSUP4
Figure 3. Pin Connections
Table 1. Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 19.
Die Pin
Pin Name
Formal Name
Definition
MCU
MCU
MCU
MCU
MCU /
Analog
1
PTC4/OSC1
Port C I/Os
These pins are special function, bidirectional I/O port pins that are
2 PTC3/OSC2
shared with other functional modules in the MCU.
3 PTC2/MCLK
4
PTB5/AD5
Port B I/Os
These pins are special function, bidirectional I/O port pins that are
5 PTB4/AD4
shared with other functional modules in the MCU.
6 PTB3/AD3
7 IRQ External Interrupt This pin is an asynchronous external interrupt input pin.
Input
8
RST
External Reset
This pin is bidirectional, allowing a reset of the entire system. It is driven
low when any internal reset source is asserted.
9 (PTD0/TACH0/BEMF PWM signal
-> PWM)
This pin is the PWM signal test pin. It internally connects the MCU
PTD0/TACH0 pin with the Analog die PWM input.
Note: Do not connect in the application.
MCU
10
PTD1/TACH1
Port D I/Os
This pin is a special function, bidirectional I/O port pin that is shared with
other functional modules in the MCU.
MCU /
Analog
44 (PTE1/RXD <- RXD) LIN Transceiver This pin is the LIN Transceiver output test pin. It internally connects the
Output
MCU PTE1/RXD pin with the Analog die LIN transceiver output pin
RXD.
Note: Do not connect in the application.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E621
3

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PIN CONNECTIONS
Table 1. Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page 19.
Die Pin
Pin Name
Formal Name
Definition
MCU
MCU
45
48
46
47
VSSA/VREFL
VDDA/VREFH
EVSS
EVDD
ADC Supply and
Reference Pins
MCU Power Supply
Pins
These pins are the power supply and voltage reference pins for the
analog-to-digital converter (ADC).
These pins are the ground and power supply pins, respectively. The
MCU operates from a single power supply.
MCU
MCU
49
50
52
53
54
51
PTA4/KBD4
PTA3/KBD3
PTA2/KBD2
PTA1/KBD1
PTA0/KBD0
FLSVPP
Port A I/Os
These pins are special function, bidirectional I/O port pins that are
shared with other functional modules in the MCU.
Test Pin
For test purposes only. Do not connect in the application.
Analog
Analog
11
12
RST_A
IRQ_A
Internal Reset
Internal Interrupt
Output
This pin is the bidirectional reset pin of the analog die.
This pin is the interrupt output pin of the analog die indicating errors or
wake-up events.
Analog
13
LIN
LIN Bus
This pin represents the single wire bus transmitter and receiver.
Analog
14
A0CST
Analog Input Trim Pin This is the analog input trim pin for the A0 input. This is to connect a
known fixed resistor value to trim the current source measurement.
Analog
Analog
Analog
Analog
Analog
15
16
19
25
30
29
26
20
17
18
21
27
28
31
32
35
22
23
24
A0
GND1
GND2
GND3
GND4
HB1
HB2
HB3
HB4
VSUP1
VSUP2
VSUP3
VSUP4
VSUP5
VSUP6
VSUP7
NC
NC
TESTMODE
Analog Input Pin This pin is an analog input port with selectable source values.
Power Ground Pins These pins are device power ground connections.
Half-bridge Outputs
Power Supply Pins
This device includes power MOSFETs configured as four half-bridge
driver outputs. These outputs may be configured for DC motor drivers,
or as high side and low side switches.
Note: The HB3 and HB4 have a lower RDS(ON) then HB1 and HB2.
These pins are device power supply pins.
No Connect
These pins are not connected.
TESTMODE Input Pin for test purpose only. In application this pin needs to be tied GND.
Analog
Analog
Analog
34
35
36
38
39
Analog
40
HS1a
HS1b
HS2
HS3
H0
L0
High Side HS1 Output This output pin is a low RDS(ON) high side switch.
High Side HS2 Output These output pins are low RDS(ON) high side switches.
High Side HS3 Output
Hall-Effect Sensor /
General Purpose
Input
Wake-up Input
This pin provides an input for a Hall-effect sensor or general purpose
input.
This pin provides an high voltage input, which is wake-up capable.
Analog
41
HVDD
Switchable VDD
Output
This pin is a switchable VDD output for driving resistive loads requiring
a regulated 5.0 V supply; e.g. potentiometers.
Analog
42
VDD
Voltage Regulator The +5. V voltage regulator output pin is intended to supply the
Output
embedded microcontroller.
908E621
4
Analog Integrated Circuit Device Data
Freescale Semiconductor

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PIN CONNECTIONS
Table 1. Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page 19.
Die Pin
Pin Name
Formal Name
Definition
Analog
43
VSS
Voltage Regulator Ground pin for the connection of all non-power ground connections
Ground
(microcontroller and sensors).
EP
Exposed Pad
Exposed Pad
The exposed pad pin on the bottom side of the package conducts heat
from the chip to the PCB board.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E621
5