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NJM2073
DUAL LOW VOLTAGE POWER AMPLIFIER
GENERAL DESCRIPTION
The NJM2073 is a monolithic integrated circuit in 8 lead
dual-in-line package,which is designed for dual audio power
amplifier in portable radio and handy cassette player.
PACKAGE OUTLINE
FEATURES
Operating Voltage
Low Crossover Distortion
Low Operating Current
Bridge or Stereo Configuration
No Turn-on Noise
Package Outline
Bipolar Technology
( V+=1.8V~15V )
DIP8,DMP8
NJM2073D
PIN CONFIGURATION
NJM2073M
NJM2073D
NJM2073M
Ver.2004-03-01
-1-

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NJM2073
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage
Output Peak Current
Power Dissipation
Input Voltage Range
Operating Temperature Range
Storage Temperature Range
SYMBOL
V+
IOP
PD
VIN
Topr
Tstg
RATINGS
15
1
( DIP8 ) 700
( DMP8 ) 300
± 0.4
-40~+85
-40~+125
( Ta=25˚C )
UNIT
V
A
mW
V
˚C
˚C
ELECTRICAL CHARACTERISTICS D-Type
(1) BTL Configuration ( Test Circuit Fig.1 )
PARAMETER
Operating Voltage
Operating Current
Output Offset Voltage
( Between the Outputs )
Input Bias Current
Output Power
Total Harmonic Distortion
Close Loop Voltage Gain
Input Impedance
Equivalent Input Noise Voltage
Ripple Rejection
Cutoff Frequency
SYMBOL
V+
ICC
VO
IB
PO
PO
PO
PO
PO
PO
PO
PO
THD
AV
ZIN
VNI1
VNI2
RR
fH
TEST CONDITION
RL=
RL=8
THD=10%,f=1kHz
VV++==96VV,,RRLL==186ΩΩ
(
( Note
Note )
)
VV++==44..55VV,,RRLL==84ΩΩ ( Note )
VV++==32VV,,RRLL==44ΩΩ
THD=1%,f=40Hz~15kHz
V+=6V,RL=8
V+=4.5V,RL=4
PO=0.5W,RL=8,f=1kHz
f=1kHz
f=1kHz
RS=10k,A Curve
RS=10k,B=22Hz~22kHz
f=100Hz
AV=-3dB from f=1kHz,RL=8,PO=1W
( Note ) At on PC Board
MIN.
1.8
-
-
-
-
0.9
-
-
200
-
-
-
-
41
100
-
-
-
-
( V+=6V,Ta=25˚C )
TYP. MAX. UNIT
- 15 V
6 9 mA
10 50 mV
100 -
nA
2.0 - W
1.2 - W
0.6 - W
0.8 - W
300 - mW
80 - mW
1.0 - W
0.6 - W
0.2 -
%
44 47 dB
- - k
2 - µV
2.5 - µV
40 - dB
130 - kHz
-2-
Ver.2004-03-01

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NJM2073
(2) Stereo Configuration ( Test Circuit Fig.2 )
PARAMETER
Operating Voltage
Output Voltage
Operating Current
Input Bias Current
Output Power ( Each Channel )
Total Harmonic Distortion
Voltage Gain
Channel Balance
Input Impedance
Equivalent Input Noise Voltage
Ripple Rejection
Cutoff Frequency
SYMBOL
V+
VO
ICC
IB
PO
PO
PO
PO
PO
PO
THD
AV
AV
ZIN
VNI1
VNI2
RR
fH
TEST CONDITION
RL=
THD=10%,f=1kHz
VV++==46.V5,VR,LR=L4=4( Note )
VV++==32VV,,RRLL==44ΩΩ
THD=1%,f=1kHz
VV++==46.V5,VR,LR=L4=4
PO=0.4W,RL=4,f=1kHz
f=1kHz
f=1kHz
RS=10k,A Curve
RS=10k,B=22Hz~22kHz
f=100Hz,CX=100µF
AV=-3dB from f=1kHz,RL=8,PO=250mW
( Note ) At on PC Board
MIN.
1.8
-
-
-
0.5
-
-
-
-
-
-
41
-
100
-
-
24
-
ELECTRICAL CHARACTERISTICS M-Type
(1) BTL Configuration ( Test Circuit Fig.1 )
PARAMETER
Operating Voltage
Operating Current
Output Offset Voltage
( Between the Outputs )
Input Bias Current
Output Power
Total Harmonic Distortion
Close Loop Voltage Gain
Input Impedance
Equivalent Input Noise Voltage
Ripple Rejection
Cutoff Frequency
SYMBOL
V+
ICC
VO
IB
PO
PO
PO
PO
PO
THD
AV
ZIN
VNI1
VNI2
RR
fH
TEST CONDITION
RL=
RL=8
THD=10%,f=1kHz
VV++==64VV,,RRLL==186ΩΩ
(
( Note
Note )
)
VV++==32VV,,RRLL==44ΩΩ ( Note )
THD=1%,f=40Hz~15kHz
V+=4V,RL=8
V+=4V,RL=8,PO=200mW,f=1kHz
f=1kHz
f=1kHz
RS=10k,A Curve
RS=10k,B=22Hz~22kHz
f=100Hz
AV=-3dB from f=1kHz,RL=16,PO=0.5W
( Note ) At on PC Board
MIN.
1.8
-
-
-
-
350
200
-
-
-
41
100
-
-
-
-
TYP. MAX. UNIT
- 15 V
2.7 -
V
6 9 mA
100 -
nA
0.65 -
W
0.32 -
W
120 - mW
30 - mW
500 - mW
250 - mW
0.25 -
%
44 47 dB
- ± 1 dB
- - k
2.5 - µV
3 - µV
30 - dB
200 - kHz
( V+=6V,Ta=25˚C )
TYP. MAX. UNIT
- 15 V
6 9 mA
10 50 mV
100 -
nA
0.8 - W
460 - mW
300 - mW
80 - mW
380 - mW
0.2 -
%
44 47 dB
- - k
2 - µV
2.5 - µV
40 - dB
130 - kHz
Ver.2004-03-01
-3-

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NJM2073
(2) Stereo Configuration ( Test Circuit Fig.2 )
PARAMETER
Operating Voltage
Output Voltage
Operating Current
Input Bias Current
Output Power ( Each Channel )
Total Harmonic Distortion
Voltage Gain
Channel Balance
Input Impedance
Equivalent Input Noise Voltage
Ripple Rejection
Cutoff Frequency
SYMBOL
V+
VO
ICC
IB
PO
PO
PO
PO
PO
PO
THD
AV
AV
ZIN
VNI1
VNI2
RR
fH
TEST CONDITION
RL=
THD=10%,f=1kHz
VV++==65VV,,RRLL==186ΩΩ( Note )
VV++==43VV,,RRLL==44ΩΩ ( Note )
V+=2V,RL=4
THD=1%,f=1kHz
V+=4V,RL=4
V+=4V,RL=4,PO=150mW,f=1kHz
f=1kHz
f=1kHz
RS=10k,A Curve
RS=10k,B=22Hz~22kHz
f=100Hz,CX=100µF
AV=-3dB from f=1kHz,RL=16,PO=125mW
MIN.
1.8
-
-
-
-
-
180
-
-
-
-
41
-
100
-
-
24
-
TYP.
-
2.7
6
100
240
270
250
120
30
180
0.25
44
-
-
2.5
3
30
200
MAX.
15
-
9
-
-
-
-
-
-
-
-
47
±1
-
-
-
-
-
UNIT
V
V
mA
nA
mW
mW
mW
mW
mW
mW
%
dB
dB
k
µV
µV
dB
kHz
( Note ) At on PC Board
TYPICAL APPLICATION & TEST CIRCUIT
Fig.1 BTL Configuration
Fig.2 Stereo Configuration
note:pin No.to D,M-Type
-4-
Ver.2004-03-01

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NJM2073
PARASTIC OSCILLATION PREVEMTING CIRCUIT
Put 1+0.22µF on parallel to load,if the load is speaker.Recommend putting 0.1µF and more than 100µF capacitors with good high
frequency characteristics in to near ground and supply voltage pins.
In BTL operation of less than 2V supply voltage,parastic oscillation may be occurred with R=1.And so recommended R to be the
same value of pure resistance(r) when it is lower than 3V.
MUTING CIRCUIT
When Mute ON.OUTPUT level saturates to GND side.
Fig.3 BTL Configuration
Fig.4 Stereo Configuration
VOLTAGE GAIN REDUCTION APPLICATION EXAMPLE
(1) Outline of way to further Reduction
NJM2073 by taking in assamption,as one of OP-AMP ( Gain 44dB,minus input impedance about 300),to feedback from output to
minus input helps to get reduction of stabilized Voltage Gain.Fig.5 indicates the model example.
Here is the point to be noticed that,in order to get the appropriate output Bias Voltage,it is important to keep the minus input floating
as DC condition,(inserting CX),and also that when extended too much reduction of Gain might cause Oscillation due to high band
phase margin.The reduction of voltage gain is limited at around 26dB (20 times),and when oscillation,it in necessary to attach the
oscillation stopper.Please examine the CX value accordingly to the application requirement.
Fig.5 Model of Voltage Gain Reduction
Ver.2004-03-01
-5-