■ PARASTIC OSCILLATION PREVEMTING CIRCUIT
Put 1Ω+0.22µF on parallel to load,if the load is speaker.Recommend putting 0.1µF and more than 100µF capacitors with good high
frequency characteristics in to near ground and supply voltage pins.
In BTL operation of less than 2V supply voltage,parastic oscillation may be occurred with R=1Ω.And so recommended R to be the
same value of pure resistance(r) when it is lower than 3V.
■ MUTING CIRCUIT
When Mute ON.OUTPUT level saturates to GND side.
Fig.3 BTL Configuration
Fig.4 Stereo Configuration
■ VOLTAGE GAIN REDUCTION APPLICATION EXAMPLE
(1) Outline of way to further Reduction
NJM2073 by taking in assamption,as one of OP-AMP ( Gain 44dB,minus input impedance about 300Ω ),to feedback from output to
minus input helps to get reduction of stabilized Voltage Gain.Fig.5 indicates the model example.
Here is the point to be noticed that,in order to get the appropriate output Bias Voltage,it is important to keep the minus input floating
as DC condition,(inserting CX),and also that when extended too much reduction of Gain might cause Oscillation due to high band
phase margin.The reduction of voltage gain is limited at around 26dB (20 times),and when oscillation,it in necessary to attach the
oscillation stopper.Please examine the CX value accordingly to the application requirement.
Fig.5 Model of Voltage Gain Reduction