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30.0-46.0 GHz GaAs MMIC
Receiver
August 2006 - Rev 01-Aug-06
Features
Sub-harmonic Receiver
Integrated LNA, LO Doubler/Buffer, Image Reject Mixer
+4.0 dBm Input Third Order Intercept (IIP3)
+2.0 dBm LO Drive Level
9.0 dB Conversion Gain
3.5 dB Noise Figure
18.0 dB Image Rejection
100% On-Wafer RF, DC and Noise Figure Testing
100% Visual Inspection to MIL-STD-883 Method 2010
Chip Device Layout
R1004
MGimeixnBeroraadblaDnd’es 3s0c.0r-4i6p.0tGiHoznGaAs MMIC receiver has a noise
figure of 3.5 dB and 18.0 dB image rejection across the band.This
device is a three stage LNA followed by an image reject resistive
pHEMT mixer and includes an integrated LO doubler and LO buffer
amplifer.The image reject mixer eliminates the need for a bandpass
filter after the LNA to remove thermal noise at the image frequency.
The use of integrated LO doubler and LO buffer amplifier makes the
provision of the LO easier than for fundamental mixers at these
frequencies. I and Q mixer outputs are provided and an external 90
degree hybrid is required to select the desired sideband.This MMIC
uses Mimix Broadband’s 0.15 µm GaAs PHEMT device model
technology, and is based upon electron beam lithography to ensure
high repeatability and uniformity.The chip has surface passivation to
protect and provide a rugged part with backside via holes and gold
metallization to allow either a conductive epoxy or eutectic solder die
attach process.This device is well suited for Millimeter-wave
Point-to-Point Radio, LMDS, SATCOM and VSAT applications.
Absolute Maximum Ratings
Supply Voltage (Vd)
Supply Current (Id1,2), (Id3)
Gate Bias Voltage (Vg)
Input Power (RF Pin)
Storage Temperature (Tstg)
Operating Temperature (Ta)
Channel Temperature (Tch)
+6.0 VDC
110, 180 mA
+0.3 VDC
+5 dBm
-65 to +165 OC
-55 to MTTF Table3
MTTF Table3
(3) Channel temperature affects a device's MTTF. It is
recommended to keep channel temperature as low as
possible for maximum life.
Electrical Characteristics (Ambient Temperature T = 25o C)
Parameter
Units Min. Typ. Max.
Frequency Range (RF) Upper Side Band
GHz 35.0 - 46.0
Frequency Range (RF) Lower Side Band
GHz 30.0 - 46.0
Frequency Range (LO)
Frequency Range (IF)
Input Return Loss RF (S11)
Small Signal Conversion Gain RF/IF (S21)2
LO Input Drive (PLO)
Image Rejection2
Noise Figure (NF)2
GHz 15.5 - 25.0
GHz DC - 4.0
dB - 10.0 -
dB - 9.0 -
dBm - +2.0 -
dBc - 18.0 -
dB - 3.5 -
Isolation LO/RF @ LOx1/LOx2
Input Third Order Intercept (IIP3)1,2
dB
dBm
- 40.0/40.0 -
- +4.0 -
Drain Bias Voltage (Vd1,2,3)
VDC - +4.0 +5.5
Gate Bias Voltage (Vg1,2,3)
VDC -1.2 -0.3 +0.1
Gate Bias Voltage (Vg4,5) Mixer, Doubler
Supply Current (Id1,2) (Vd1,2=4.0, Vg=-0.3V Typical)
Supply Current (Id3) (Vd3=4.0V,Vg=-0.3V Typical)
VDC -1.2 -0.5 +0.1
mA -
50 100
mA - 145 165
(1) Measured using constant current.
(2) Measured using LO Input drive level of 0.0 and +2.0 dBm.
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 1 of 7
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

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30.0-46.0 GHz GaAs MMIC
Receiver
August 2006 - Rev 01-Aug-06
Receiver Measurements
R1004
XR1004 Vd1,2,3=4.0 V, Id1,2=50 mA, Id3=145 mA, USB
LO=+2.0 dBm, IF=2.0 GHz, RF=-20.0 dBm, ~1570 Devices
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 41.0 42.0 43.0 44.0 45.0 46.0
RF Frequency (GHz)
Max Median Mean -3sigma
XR1004 Vd1,2,3=4.0 V, Id1,2=50 mA, Id3=145 mA, LSB
LO=+2.0 dBm, IF=2.0 GHz, RF=-20.0 dBm, ~1570 Devices
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 41.0 42.0 43.0 44.0 45.0 46.0
RF Frequency (GHz)
Max Median Mean -3sigma
XR1004 Vd1,2,3=4.0 V, Id1,2=50 mA, Id3=145 mA, USB
LO=+2.0 dBm, IF=2.0 GHz, RF=-20.0 dBm, ~1570 Devices
0
-5
-10
-15
-20
-25
-30
-35
-40
30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 41.0 42.0 43.0 44.0 45.0 46.0
RF Frequency (GHz)
Max Median Mean -3sigma
XR1004 Vd1,2,3=4.0 V, Id1,2=50 mA, Id3=145 mA, LSB
LO=+2.0 dBm, IF=2.0 GHz, RF=-20.0 dBm, ~1570 Devices
0
-5
-10
-15
-20
-25
-30
-35
30.0 31.0 32.0 33.0 34.0 35.0 36.0 37.0 38.0 39.0 40.0 41.0 42.0 43.0 44.0 45.0 46.0
RF Frequency (GHz)
Max Median Mean -3sigma
24
22
20
18
16
14
12
10
8
6
4
2
0
32
40REC0452 (LSB, IF = 2 GHz, Pout_scl = -9 dBm): aver OIP3 vs RF
LO = -2 dBm (red) and +2 dBm (blue). 5 devices measured
33 34 35 36 37 38 39
RF Freq (GHz)
40
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 2 of 7
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

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30.0-46.0 GHz GaAs MMIC
Receiver
August 2006 - Rev 01-Aug-06
Mechanical Drawing
1.620
(0.064)
1.170
(0.046)
2
1.571
(0.062)
1.871
(0.074)
34
2.470
(0.097)
5
R1004
6
0.646
(0.025)
0.298
(0.012)
1
0.0
12 11 10
9
87
0.0
1.170
1.571 1.871
2.271
2.671
3.071
3.970
(0.046)
(0.062) (0.074)
(0.089)
(0.105)
(0.121)
(0.156)
(Note: Engineering designator is 40REC0452)
Units: millimeters (inches) Bond pad dimensions are shown to center of bond pad.
Thickness: 0.110 +/- 0.010 (0.0043 +/- 0.0004), Backside is ground, Bond Pad/Backside Metallization: Gold
All DC/IF Bond Pads are 0.100 x 0.100 (0.004 x 0.004). All RF Bond Pads are 0.100 x 0.200 (0.004 x 0.008)
Bond pad centers are approximately 0.109 (0.004) from the edge of the chip.
Dicing tolerance: +/- 0.005 (+/- 0.0002). Approximate weight: 3.987 mg.
Bond Pad #1 (RF In) Bond Pad #3 (Vd2) Bond Pad #5 (Vd3) Bond Pad #7 (Vg5) Bond Pad #9 (Vg4) Bond Pad #11 (Vg2)
Bond Pad #2 (Vd1) Bond Pad #4 (IF1) Bond Pad #6 (LO) Bond Pad #8 (Vg3) Bond Pad #10 (IF2) Bond Pad #12 (Vg1)
Bias Arrangement
Vd2
Vd1
IF1
2 34
5
Vd3
Bypass Capacitors - See App Note [2]
Vd1,2
Vd3
IF1
RF 1
Vg1
12 11
Vg2
10
IF2
9 87
Vg4 Vg3
6 RF Out
RF
XR1004
Vg5
LO
Vg5
IF2
Vg1,2
Vg4 Vg3
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 3 of 7
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

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30.0-46.0 GHz GaAs MMIC
Receiver
August 2006 - Rev 01-Aug-06
R1004
App Note [1] Biasing - As shown in the bonding diagram, this device is operated by separately biasing Vd1, Vd2 and Vd3 with
Vd(1,2,3)=4.0V, Id1=Id2=25mA and Id3=145mA. Additionally, a mixer and doubler bias are also required with Vg4=Vg5=-0.5V. Adjusting Vg4
and Vg5 above or below this value can adversely affect conversion gain, image rejection and intercept point performance. It is also
recommended to use active biasing to keep the currents constant as the RF power and temperature vary; this gives the most reproducible
results. Depending on the supply voltage available and the power dissipation constraints, the bias circuit may be a single transistor or a low
power operational amplifier, with a low value resistor in series with the drain supply used to sense the current.The gate of the pHEMT is
controlled to maintain correct drain current and thus drain voltage.The typical gate voltage needed to do this is -0.3V.Typically the gate is
protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is
available before applying the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC bypass
capacitors (~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or combination (if
gate or drains are tied together) of DC bias pads.
For Individual Stage Bias -- Each DC pad (Vd1,2,3 and Vg1,2,3,4,5) needs to have DC bypass capacitance (~100-200 pF) as close to the device
as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.
MTTF Table (TBD)
These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.
Backplate
Temperature
55 deg Celsius
75 deg Celsius
95 deg Celsius
Channel
Temperature
deg Celsius
deg Celsius
deg Celsius
Rth
MTTF Hours
FITs
C/W E+ E+
C/W E+ E+
C/W E+ E+
Bias Conditions: Vd1=Vd2=Vd3=4.0V, Id1=Id2=25 mA, Id3=145 mA
Typical Application
RF IN
37.0-39.5 GHz
XR1004
Coupler
BPF
IF Out
2 GHz
LNA IR Mixer
Buffer
AGC Control
X2
LO(+2.0dBm)
17.5-18.75 GHz (USB Operation)
19.5-20.75 GHz (LSB Operation)
Mimix Broadband MMIC-based 30.0-46.0 GHz Receiver Block Diagram
(Changing LO and IF frequencies as required allows design to operate as high as 46 GHz)
Mimix Broadband's 30.0-46.0 GHz XR1004 GaAs MMIC Receiver can be used in saturated radio applications and linear modulation schemes
up to 128 QAM.The receiver can be used in upper and lower sideband applications from 30.0-46.0 GHz.
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 4 of 7
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

No Preview Available !

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30.0-46.0 GHz GaAs MMIC
Receiver
August 2006 - Rev 01-Aug-06
App Note [3] USB/LSB Selection -
LSB USB
IF2 IF1
An alternate method of Selection of USB or LSB:
USB
R1004
For Upper Side Band operation (USB):
With IF1 and IF2 connected to the
direct port (0º) and coupled port (90º)
respectively as shown in the diagram,
the USB signal will reside on the
isolated port. The input port must be
loaded with 50 ohms.
For Lower Side Band operation (LSB):
With IF1 and IF2 connected to the
direct port (0º) and coupled port (90º)
respectively as shown in the diagram,
the LSB signal will reside on the input
port. The isolated port must be loaded
with 50 ohms.
LSB
In Phase Combiner
-90o
IF2
IF1
In Phase Combiner
-90o
IF2 IF1
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 5 of 7
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.