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D-2
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Japanese Equivalent JFET Types
Silicon Junction Field-Effect Transistors
01/99
Parameters
BVGSS
IGSS
VGS(off)
IDSS
gfs
Ciss
Crss
Japanese
InterFET
Process
2SK17
IFN17
NJ16
Conditions
Unit
Limit
N
Channel
IG = – 1.0 µA
V
Min
– 20
VGS = ( ), VDS = Ø
nA 0.10
Max (–10 V)
VDS = ( ), ID = 1.0 nA
V – 0.5/– 6.0
Min/Max (10 V)
VDS = ( ), VGS = Ø
mA
Min/Max
0.3/6.5
(10 V)
VDS = ( ), VGS = Ø
mS 2.0
Typ (10 V)
VGS = ( ), VDS = ( )
pF 4.0
Typ (Ø) (Ø)
VGS = ( ), VDS = ( )
pF 1.2
Typ (– 10 V) (Ø)
Package Configuration
Pin Configuration
TO-226AA
SGD
2SK40
IFN40
NJ16
N
Channel
– 50
1.0
(– 30 V)
– 0.4/– 5.0
(15 V)
0.6/6.5
(15 V)
2.0
(15 V)
4.0
(Ø) (15 V)
1.2
(Ø) (15 V)
TO-226AA
SGD
2SK59
IFN59
NJ16
N
Channel
2SK105
IFN105
NJ16
N
Channel
– 30 – 50
1.0
(–10 V)
– 0.4/– 5.0
(10 V)
0.3/1.4
(10 V)
1.5
(10 V)
TO-226AA
SGD
1.0
(– 30 V)
– 0.25/– 4.5
(5.0 V)
0.5/12
(5.0 V)
2.1
(5.0 V)
4.0
(Ø) (10 V)
1.0
(Ø) (10 V)
TO-226AA
DGS
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287 FAX (972) 276-3375
www.interfet.com