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Intel£ Advanced+ Boot Block Flash
Memory (C3)
28F800C3, 28F160C3, 28F320C3, 28F640C3 (x16)
Datasheet
Product Features
Flexible SmartVoltage Technology
— 2.7 V– 3.6 V Read/Program/Erase
— 12 V for Fast Production Programming
1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
— Reduces Overall System Power
High Performance
— 2.7 V– 3.6 V: 70 ns Max Access Time
Optimized Architecture for Code Plus
Data Storage
— Eight 4 Kword Blocks, Top or Bottom
Parameter Boot
— Up to One Hundred-Twenty-Seven 32
Kword Blocks
— Fast Program Suspend Capability
— Fast Erase Suspend Capability
Flexible Block Locking
— Lock/Unlock Any Block
— Full Protection on Power-Up
— WP# Pin for Hardware Block Protection
Low Power Consumption
— 9 mA Typical Read
— 7 A Typical Standby with Automatic
Power Savings Feature (APS)
Extended Temperature Operation
— –40 °C to +85 °C
128-bit Protection Register
— 64 bit Unique Device Identifier
— 64 bit User Programmable OTP Cells
Extended Cycling Capability
— Minimum 100,000 Block Erase Cycles
Software
— Intel® Flash Data Integrator (FDI)
— Supports Top or Bottom Boot Storage,
Streaming Data (e.g., voice)
— Intel Basic Command Set
— Common Flash Interface (CFI)
Standard Surface Mount Packaging
— 48-Ball µBGA*/VFBGA
— 64-Ball Easy BGA Packages
— 48-Lead TSOP Package
ETOX™ VIII (0.13 µm) Flash
Technology
— 16, 32 Mbit
ETOX™ VII (0.18 µm) Flash Technology
— 16, 32, 64 Mbit
ETOX™ VI (0.25 µm) Flash Technology
— 8, 16 and 32 Mbit
The Intel® Advanced+ Book Block Flash Memory (C3) device, manufactured on Intel’s latest
0.13 µm and 0.18 µm technologies, represents a feature-rich solution for low-power applications.
The C3 device incorporates low-voltage capability (3 V read, program, and erase) with high-
speed, low-power operation. Flexible block locking allows any block to be independently locked
or unlocked. Add to this the Intel® Flash Data Integrator (FDI) software and you have a cost-
effective, flexible, monolithic code plus data storage solution. Intel® Advanced+ Boot Block Flash
Memory (C3) products will be available in 48-lead TSOP, 48-ball CSP, and 64-ball Easy BGA
packages. Additional information on this product family can be obtained by accessing the Intel®
Flash website: http://www.intel.com/design/flash.
Notice: This specification is subject to change without notice. Verify with your local Intel sales
office that you have the latest datasheet before finalizing a design.
Order Number: 290645-017
October 2003

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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 28F800C3, 28F160C3, 28F320C3, 28F640C3 may contain design defects or errors known as errata which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright © Intel Corporation, 2003
*Third-party brands and names are the property of their respective owners.
2 Datasheet

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Contents
Contents
1.0
2.0
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3.0
4.0
5.0
Introduction.................................................................................................................................... 7
1.1 Document Purpose ...............................................................................................................7
1.2 Nomenclature .......................................................................................................................7
1.3 Conventions..........................................................................................................................7
Device Description ........................................................................................................................8
2.1 Product Overview .................................................................................................................8
2.2 Ballout Diagram ....................................................................................................................8
2.3 Signal Descriptions .............................................................................................................13
2.4 Block Diagram ....................................................................................................................14
2.5 Memory Map .......................................................................................................................15
Device Operations .......................................................................................................................17
3.1 Bus Operations ...................................................................................................................17
3.1.1 Read ......................................................................................................................17
3.1.2 Write ......................................................................................................................17
3.1.3 Output Disable .......................................................................................................17
3.1.4 Standby..................................................................................................................18
3.1.5 Reset .....................................................................................................................18
Modes of Operation .....................................................................................................................19
4.1 Read Mode .........................................................................................................................19
4.1.1 Read Array.............................................................................................................19
4.1.2 Read Identifier .......................................................................................................19
4.1.3 CFI Query ..............................................................................................................20
4.1.4 Read Status Register.............................................................................................20
4.1.4.1 Clear Status Register .............................................................................21
4.2 Program Mode ....................................................................................................................21
4.2.1 12-Volt Production Programming...........................................................................21
4.2.2 Suspending and Resuming Program .....................................................................22
4.3 Erase Mode ........................................................................................................................22
4.3.1 Suspending and Resuming Erase .........................................................................23
Security Modes ............................................................................................................................27
5.1 Flexible Block Locking ........................................................................................................27
5.1.1 Locking Operation..................................................................................................28
5.1.1.1 Locked State ..........................................................................................28
5.1.1.2 Unlocked State.......................................................................................28
5.1.1.3 Lock-Down State....................................................................................28
5.2 Reading Block-Lock Status.................................................................................................28
5.3 Locking Operations during Erase Suspend ........................................................................29
5.4 Status Register Error Checking ..........................................................................................29
5.5 128-Bit Protection Register .................................................................................................29
5.5.1 Reading the Protection Register ............................................................................30
5.5.2 Programming the Protection Register....................................................................30
5.5.3 Locking the Protection Register .............................................................................30
5.6 VPP Program and Erase Voltages ......................................................................................30
Datasheet
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Contents
5.6.1 Program Protection................................................................................................ 31
6.0
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Power Consumption.................................................................................................................... 32
6.1 Active Power (Program/Erase/Read).................................................................................. 32
6.2 Automatic Power Savings (APS) ........................................................................................ 32
6.3 Standby Power ................................................................................................................... 32
6.4 Deep Power-Down Mode.................................................................................................... 32
6.5 Power and Reset Considerations ....................................................................................... 33
6.5.1 Power-Up/Down Characteristics............................................................................ 33
6.5.2 RP# Connected to System Reset .......................................................................... 33
6.5.3 VCC, VPP and RP# Transitions ............................................................................ 33
6.6 Power Supply Decoupling................................................................................................... 34
7.0 Thermal and DC Characteristics ................................................................................................ 34
7.1 Absolute Maximum Ratings ................................................................................................ 34
7.2 Operating Conditions .......................................................................................................... 35
7.3 DC Current Characteristics................................................................................................. 35
7.4 DC Voltage Characteristics................................................................................................. 38
8.0 AC Characteristics ...................................................................................................................... 39
8.1 AC Read Characteristics .................................................................................................... 39
8.2 AC Write Characteristics..................................................................................................... 43
8.3 Erase and Program Timings ............................................................................................... 47
8.4 Reset Specifications ........................................................................................................... 48
8.5 AC I/O Test Conditions ....................................................................................................... 49
8.6 Device Capacitance............................................................................................................ 49
Appendix A Write State Machine States.............................................................................................50
Appendix B Flow Charts ......................................................................................................................52
Appendix C Common Flash Interface.................................................................................................58
Appendix D Mechanical Specifications..............................................................................................64
Appendix E Additional Information ....................................................................................................67
Appendix F Ordering Information .......................................................................................................68
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Contents
Revision History
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Date of
Revision
05/12/98
07/21/98
10/03/98
12/04/98
12/31/98
02/24/99
06/10/99
03/20/00
04/24/00
10/12/00
7/20/01
10/02/01
2/05/02
Version
-001
-002
-003
-004
-005
-006
-007
-008
-009
-010
-011
-012
-013
Description
Original version
48-Lead TSOP package diagram change
µBGA package diagrams change
32-Mbit ordering information change (Section 6)
CFI Query Structure Output Table Change (Table C2)
CFI Primary-Vendor Specific Extended Query Table Change for Optional
Features and Command Support change (Table C8)
Protection Register Address Change
IPPD test conditions clarification (Section 4.3)
µBGA package top side mark information clarification (Section 6)
Byte-Wide Protection Register Address change
VIH Specification change (Section 4.3)
VIL Maximum Specification change (Section 4.3)
ICCS test conditions clarification (Section 4.3)
Added Command Sequence Error Note (Table 7)
Datasheet renamed from 3 Volt Advanced Boot Block, 8-, 16-, 32-Mbit Flash
Memory Family.
Added tBHWH/tBHEH and tQVBL (Section 4.6)
Programming the Protection Register clarification (Section 3.4.2)
Removed all references to x8 configurations
Removed reference to 40-Lead TSOP from front page
Added Easy BGA package (Section 1.2)
Removed 1.8 V I/O references
Locking Operations Flowchart changed (Appendix B)
Added tWHGL (Section 4.6)
CFI Primary Vendor-Specific Extended Query changed (Appendix C)
Max ICCD changed to 25 µA
Table 10, added note indicating VCCMax = 3.3 V for 32-Mbit device
Added specifications for 0.18 micron product offerings throughout document
Added 64-Mbit density
Changed references of 32Mbit 80ns devices to 70ns devices to reflect the
faster product offering.
Changed VccMax=3.3V reference to indicate that the affected product is the
0.25µm 32Mbit device.
Minor text edits throughout document.
Added 1.8v I/O operation documentation where applicable
Added TSOP PCN ‘Pin-1’ indicator information
Changed references in 8 x 8 BGA pinout diagrams from ‘GND’ to ‘Vssq’
Added ‘Vssq’ to Pin Descriptions Information
Removed 0.4 µm references in DC characteristics table
Corrected 64Mb package Ordering Information from 48-uBGA to 48-VFBGA
Corrected ‘bottom’ parameter block sizes to on 8Mb device to 8 x 4KWords
Minor text edits throughout document
Added specifications for 0.13 micron product offerings throughout document
Corrected Iccw / Ippw / Icces /Ippes values.
Added mechanicals for 16Mb and 64Mb
Minor text edits throughout document.
Datasheet
5