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PO74G38072A
3.3V 1:2 CMOS Clock Driver
1GHz TTL/CMOS Potato Chip
02/13/07
FEATURES:
DESCRIPTION:
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. Patented technology
. Max input frequency > 1GHz
. Operating frequency up to 1GHz with 2pf load
. Operating frequency up to 700MHz with 5pf load
. Operating frequency up to 400MHz with 15pf load
. Operating frequency up to 200MHz with 50pf load
. Very low output pin to pin skew < 20ps
. VCC = 1.65V to 3.6V
. Propagation delay < 1.3ns max with 15pf load
. Low input capacitance: 3pf typical
. 1:2 fanout
. Available in 8 pin SOIC package
Potato Semiconductor’s PO74G38072A is
designed for world top performance using
submicron CMOS technology to achieve 1GHz
TTL output frequency with less than 20ps
output pin to pin skew.
PO74G38072A is a 3.3V CMOS 1 input to 2
outputs Buffered driver to achieve 1GHz output
frequency. Typical applications are clock and
signal distribution.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
Pin Configuration
Logic Block Diagram
VCC 1
VCC 2
IN 3
GND 4
8 GND
7 O2
6 O1
5 GND
IN
O1
O2
Pin Description
Pin Name
IN
Ox
Description
Input
Outputs
1
Copyright © Potato Semiconductor Corporation

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PO74G38072A
3.3V 1:2 CMOS Clock Driver
1GHz TTL/CMOS Potato Chip
02/13/07
Maximum Ratings
Description
Max
www.DataSheet4U.com Storage Temperature
-65 to 150
Operation Temperature -40 to 85
Operation Voltage
-0.5 to +4.6
Input Voltage
-0.5 to +5.5
Output Voltage
-0.5 to Vcc+0.5
Unit
°C
°C
V
V
V
Note:
stresses greater than listed under
Maximum Ratings may cause
permanent damage to the device. This
is a stress rating only and functional
operation of the device at these or any
other conditions above those indicated
in the operational sections of this
specification is not implied. Exposure
to absolute maximum rating conditions
for extended periods may affect
reliability specification is not implied.
DC Electrical Characteristics
Symbol
Description
Test Conditions
VOH
VOL
VIH
VIL
IIH
IIL
VIK
Output High voltage Vcc=3V Vin=VIH or VIL, IOH= -12mA
Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA
Input High voltage Guaranteed Logic HIGH Level (Input Pin)
Input Low voltage
Guaranteed Logic LOW Level (Input Pin)
Input High current Vcc = 3.6V and Vin = 5.5V
Input Low current
Vcc = 3.6V and Vin = 0V
Clamp diode voltage Vcc = Min. And IIN = -18mA
Min Typ Max Unit
2.4 3 - V
- 0.3 0.5 V
2 - Vcc V
-0.5 - 0.8 V
- - 1 uA
- - -1 uA
- -0.7 -1.2 V
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, 25 °C ambient.
3. This parameter is guaranteed but not tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
5. VoH = Vcc – 0.6V at rated current
2
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PO74G38072A
3.3V 1:2 CMOS Clock Driver
1GHz TTL/CMOS Potato Chip
02/13/07
Power Supply Characteristics
Symbol
Description
Test Conditions (1)
Min Typ Max Unit
IccQ Quiescent Power Supply Current
Vcc=Max, Vin=Vcc or GND -
0.1 30 uA
www.DataSheet4U.com !Icc Power Supply Current per Input High Vcc=Max, Vin= Vcc-0.6V
- 50 300 uA
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, 25°C ambient.
3. This parameter is guaranteed but not tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
5. VoH = Vcc – 0.6V at rated current
Capacitance
Parameters (1)
Cin
Cout
Description
Input Capacitance
Output Capacitance
Test Conditions
Vin = 0V
Vout = 0V
Typ Max Unit
3 4 pF
- 6 pF
Notes:
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
tPLH
tPHL
tr/tf
Propagation Delay A to Bn
Propagation Delay A to Bn
Rise/Fall Time
Test Conditions (1)
CL = 15pF
CL = 15pF
0.8V – 2.0V
Max
Unit
1.3 ns
1.3 ns
0.8 ns
tsk(o)
tsk(pp)
fmax
fmax
fmax
fmax
Output Pin to Pin Skew (Same Package)
Output Skew (Different Package)
Input Frequency
Input Frequency
Input Frequency
Input Frequency
CL = 15pF, 125MHz
CL = 15pF, 125MHz
CL = 50pF
CL =15pF
CL = 5pF
CL = 2pF
20
0.25
200
400
700
1000
Notes:
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
ps
ns
MHz
MHz
MHz
MHz
3
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PO74G38072A
3.3V 1:2 CMOS Clock Driver
1GHz TTL/CMOS Potato Chip
02/13/07
Test Waveforms
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Test Circuit
Vcc
Pulse
Generator
50
D.U.T
50pF
to
2pF
4
Copyright © Potato Semiconductor Corporation

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PO74G38072A
3.3V 1:2 CMOS Clock Driver
1GHz TTL/CMOS Potato Chip
02/13/07
Packaging Mechanical Drawing: 8 pin SOIC
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8 0-8˚
.149 3.78
.157 3.99
.0099
.0196
0.25
0.50
x 45˚
.016
.050
0.40
1.27
.2284
.2440
5.80
6.20
.016
.026
0.406
0.660
REF
.050
BSC
1.27
1
.189 4.80
.196 5.00
.053 1.35
.068 1.75
SEATING PLANE
.0040 0.10
.0098 0.25
.013 0.330
.020 0.508
.0075 0.19
.0098 0.25
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Ordering Information
Ordering Code
PO74G38072ASU
PO74G38072ASR
8-pin SOIC
8-pin SOIC
Package
Tube
Tape and reel
Pb-free & Green
Pb-free & Green
Top-Marking
PO74G38072AS
PO74G38072AS
TA
-40°C to 85°C
-40°C to 85°C
5
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