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ISL6341, ISL6341A, ISL6341B, ISL6341C
®
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Data Sheet
December 2, 2008
FN6538.2
5V or 12V Single Synchronous Buck
Pulse-Width Modulation (PWM) Controller
The ISL6341, ISL6341A, ISL6341B, ISL6341C makes
simple work out of implementing a complete control and
protection scheme for a DC/DC stepdown converter driving
N-Channel MOSFETs in a synchronous buck topology. Since
it can work with either 5V or 12V supplies, this one family of
IC’s can be used in a wide variety of applications within a
system. It integrates the control, gate drivers, output
adjustment, monitoring and protection functions into a single
10 Ld Thin DFN package.
The ISL6341, ISL6341A, ISL6341B, ISL6341C (hereafter
referred to as “ISL6341x”, except as needed) provides single
feedback loop, voltage-mode control with fast transient
response. The output voltage can be precisely regulated to as
low as 0.8V, with a maximum tolerance of ±0.8%
over-temperature and line voltage variations. A fixed frequency
oscillator and wide duty cycle range reduces design complexity,
while balancing typical application cost and efficiency. The
frequency, duty cycle and OCP response are the only
differences among the ISL6341x versions. See Table 1.
Protection from overcurrent conditions is provided by
monitoring the rDS(ON) of the lower MOSFET to inhibit PWM
operation appropriately (see “Overcurrent Protection (OCP)”
on page 8 for details). This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor. The output voltage is also
monitored for undervoltage and overvoltage protection, in
addition to monitoring for a PGOOD output.
Ordering Information
PART NUMBER PART
TEMP.
PACKAGE
(Note)
MARKING RANGE (°C) (Pb-free)
PKG.
DWG. #
ISL6341ACRZ* 41AC
0 to +70 10 Ld 3x3 TDFN L10.3x3B
ISL6341BCRZ* 41BC
0 to +70 10 Ld 3x3 TDFN L10.3x3B
ISL6341CCRZ* 41CC
0 to +70 10 Ld 3x3 TDFN L10.3x3B
ISL6341CRZ* 341C
0 to +70 10 Ld 3x3 TDFN L10.3x3B
ISL6341AIRZ* 41AI
-40 to +85 10 Ld 3x3 TDFN L10.3x3B
ISL6341BIRZ* 41BI
-40 to +85 10 Ld 3x3 TDFN L10.3x3B
ISL6341CIRZ* 41CI
-40 to +85 10 Ld 3x3 TDFN L10.3x3B
ISL6341IRZ* 6341
-40 to +85 10 Ld 3x3 TDFN L10.3x3B
ISL6341EVAL1Z Evaluation Board
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel
specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Operates from +4.5V to 14.4V Supply Voltage (for Bias)
- 1.5V to 12V VIN Input Range (Up to 20V is Possible with
Restrictions; see “Input Voltage Considerations” on
page 12)
- 0.8V to ~VIN Output Range (Duty Cycle Limited)
- Integrated Gate Drivers; LGATE Uses VCC (5V to 12V);
UGATE Uses External Boot Diode to (5V to 12V)
- 0.8V Internal Reference; ±0.8% Tolerance
• Simple Single-Loop Control Design
- Traditional Dual Edge Modulator
- Voltage-Mode PWM Control
- Drives N-Channel MOSFETs
• Fast Transient Response
- High-Bandwidth Error Amplifier
- 0% to 85% Max Duty Cycle for ISL6341, ISL6341C
- 0% to 75% Max Duty Cycle for ISL6341A, ISL6341B
• Lossless, Programmable Overcurrent Protection
- Uses Lower MOSFET’s rDS(ON)
- Latch off mode (ISL6341, ISL6341B)
- Infinite Retry (Hiccup) Mode (ISL6341A)
- Infinite Retry (Hiccup) Mode; no UVP (ISL6341C)
• Output Voltage Monitoring
- Undervoltage and Overvoltage Shutdown
- PGOOD Output
• Small Converter Size in 10 Ld 3x3 Thin DFN
- 300kHz Fixed Oscillator (ISL6341, ISL6341C)
- 600kHz Fixed Oscillator (ISL6341A, ISL6341B)
- Fixed Internal Soft-Start, Capable into a Pre-biased
Load
- Enable/Shutdown Function on COMP/EN Pin
• Pb-Free (RoHS Compliant)
Applications
• Power Supplies for Microprocessors or Peripherals
- PCs, Servers, Memory Supplies
- DSP and Core Communications Processor Supplies
• Subsystem Power Supplies
- PCI, AGP; Graphics Cards; Digital TV
- SSTL-2 and DDR/DDR2/DDR3 SDRAM Bus
Termination Supply
• Cable Modems, Set-Top Boxes, and DSL Modems
• Industrial Power Supplies; General Purpose Supplies
• 5V or 12V-Input DC/DC Regulators
• Low-Voltage Distributed Power Supplies; Point of Load
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Pinout
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Block Diagram
ISL6341, ISL6341A, ISL6341B, ISL6341C
ISL6341, ISL6341A, ISL6341B, ISL6341C
(10 LD 3x3 TDFN)
TOP VIEW
BOOT 1
PHASE 2
UGATE 3
LGATE/OCSET 4
GND 5
10 PGOOD
9 VOS
8 FB
7 COMP/EN
6 VCC
VCC
FB
COMP/EN
VOS
SAMPLE
AND
HOLD
+
OC -
COMPARATOR
POR AND
SOFT-START
INTERNAL
REGULATOR
5V INT.
10µA
TO
LGATE/OCSET
ERROR
AMP
0.8V
+
-
PWM
COMPARATOR
+
-
20kΩ
INHIBIT
GATE
CONTROL
PWM LOGIC
VCC
EN
+
+25%
-
OV1
5V INT.
20µA
0.7V
-
EN
+
OSCILLATOR
300kHz OR 600kHz
-25% +
-
UV1
+
+10% -
OV2
OC
-10% +
-
UV2
BOOT
UGATE
PHASE
LGATE/OCSET
GND
PGOOD
2 FN6538.2
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ISL6341, ISL6341A, ISL6341B, ISL6341C
Typical Application
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VCC
5V TO 12V
CDCPL
VGD
5V TO 12V
VCC
TYPE II
PGOOD 10
6
COMPENSATION
SHOWN COMP/EN 7 ISL6341x
BOOT
1
2 PHASE
3 UGATE
CBOOT
RF
CI FB 8
LGATE/OCSET
CF
95
4
VOS
GND
ROCSET
ROFFSET
RS
RVOS1
VIN
1.5V TO 12V
CHF
CBULK
LOUT
COUT
+VO
RVOS2
3 FN6538.2
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ISL6341, ISL6341A, ISL6341B, ISL6341C
Absolute Maximum Ratings
Supply Voltage, (VCC) . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 15V
BOwOwTwV.DolatatagSeh(eVeBtO4UO.Tc-oGmND). . . . . . . . . . . . . . . . GND - 0.3V to 36V
BOOT to PHASE Voltage (VBOOT - VPHASE) . . . GND - 0.3V to 15V
-0.3V to 16V (<10ns, 10µJ)
UGATE Voltage (VUGATE) . . . . . . . VPHASE - 0.3V to VBOOT + 0.3V
VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT +0.3V
LGATE/OCSET Voltage (VLGATE) . . . . . . GND - 0.3V to VCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to VCC + 0.3V
PHASE Voltage (VPHASE) . . . . . . . . . .GND - 0.3V to VBOOT + 0.3V
GND - 8V (<400ns, 20µJ) to 30V (<200ns, VBOOT-GND <36V)
FB, VOS, COMP/EN Voltage . . . . . . . . . . . . . . . . . GND - 0.3V to 6V
PGOOD Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
10 Ld TDFN Package (Notes 1, 2). . . .
44
3.5
Maximum Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Supply Voltage Range, VCC . . . . . . . . . . . . . . . . . . . +4.5V to 14.4V
Ambient Temperature Range
ISL6341xCRZ (Commercial) . . . . . . . . . . . . . . . . . . 0°C to +70°C
ISL6341xIRZ (Industrial) . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air, with “direct attach” features. See
Tech Brief TB379 for details.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Test Conditions: VCC = 12V, TJ = 0°C to +85°C, Unless Otherwise Noted. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Input Bias Supply Current
Input Bias Supply Current
POWER-ON RESET
IVCC_dis VCC = 12V; disabled
IVCC_en VCC = 12V; enabled (but not switching)
7.0 mA
6.4 8.9 10.4 mA
Rising VCC POR Threshold
VCC POR Threshold Hysteresis
OSCILLATOR
VPOR
3.8 4.2 4.47
0.15 0.48 0.85
V
V
Switching Frequency
fOSC
ISL6341C, ISL6341CC
ISL6341I, ISL6341CI
270 300 330
240 300 330
kHz
kHz
ISL6341AC, ISL6341BC
540 600 660
kHz
ISL6341AI, ISL6341BI
510 600 660
kHz
Ramp Amplitude (Note 3)
REFERENCE
ΔVOSC
1.5 VP-P
Reference Voltage Tolerance
VREF
ISL6341C, ISL6341AC, ISL6341BC,
ISL6341CC
0.7936 0.8000 0.8064
V
ISL6341I, ISL6341AI, ISL6341BI, ISL6341CI 0.7920 0.8000 0.8080
V
ERROR AMPLIFIER
DC Gain (Note 3)
GAIN
96 dB
Gain-Bandwidth Product (Note 3)
GBWP
20 MHz
Slew Rate (Note 3)
SR
8 V/µs
GATE DRIVERS
Upper Gate Source Impedance
Upper Gate Sink Impedance
Lower Gate Source Impedance
Lower Gate Sink Impedance
Upper Gate Source Impedance
RUG-SRCh VCC = 12V; I = 50mA
RUG-SNKh VCC = 12V; I = 50mA
RLG-SRCh VCC = 12V; I = 50mA
RLG-SNKh VCC = 12V; I = 50mA
RUG-SRCl VCC = 5V; I = 50mA
2.1 Ω
1.6 Ω
1.4 Ω
1.0 Ω
2.4 Ω
4 FN6538.2
December 2, 2008

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ISL6341, ISL6341A, ISL6341B, ISL6341C
Electrical Specifications
www.DataSheet4U.com
PARAMETER
Test Conditions: VCC = 12V, TJ = 0°C to +85°C, Unless Otherwise Noted. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested. (Continued)
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Upper Gate Sink Impedance
Lower Gate Source Impedance
Lower Gate Sink Impedance
PROTECTION/DISABLE
RUG-SNKl
RLG-SRCl
RLG-SNKl
VCC = 5V; I = 50mA
VCC = 5V; I = 50mA
VCC = 5V; I = 50mA
1.7 Ω
1.5 Ω
1.1 Ω
OCSET Current Source
Enable Threshold (COMP/EN pin)
VOS Rising Trip (PGOOD OV; +10%)
IOCSET LGATE/OCSET = 0V
VENABLE
9
0.683
0.868
10
0.700
0.880
11
0.717
0.888
µA
V
V
VOS Rising Trip (PGOOD OV) Hysteresis
16 mV
VOS Falling Trip (PGOOD UV; -10%)
0.708 0.720 0.732
V
VOS Falling Trip (PGOOD UV) Hysteresis
16 mV
VOS Rising Threshold (OV; +25%)
0.980 1.000 1.020
V
VOS Falling Threshold (UV; -25%)
(Note 5)
0.580 0.600 0.620
V
VOS Threshold (OV; 50% of VOUT)
VOS Bias Current
VOS = 0.25V
0.380
-1500
0.400
-250
0.410
-100
V
nA
PGOOD
NOTES:
IPGOOD = 4mA
0.10 0.18 0.30
V
3. Limits should be considered typical and are not production tested.
4. Limits established by characterization and are not production tested.
5. The UVP is disabled on the ISL6341C; no trip point is measured.
Functional Pin Description
VCC (Pin 6)
This pin provides the bias supply for the ISL6341x, as well
as the lower MOSFET’s gate. An internal regulator will
supply bias as VCC rises above 5V, but the LGATE/OCSET
will still be sourced by VCC. Connect a well-decoupled 5V to
12V supply to this pin.
FB (Pin 8)
This pin is the inverting input of the internal error amplifier. Use
FB, in combination with the COMP/EN pin, to compensate the
voltage-control feedback loop of the converter. A resistor divider
from VOUT to FB to GND is used to set the regulation voltage.
VOS (Pin 9)
This input pin monitors the regulator output for OV and UV
protection, and PGOOD (OV and UV). Connect a resistor
divider from VOUT to VOS to GND, with the same ratio as
the FB resistor divider. It is not recommended to share one
divider for both FB and VOS; the response to a fault may not
be as quick or robust. There is a small pull-up bias current
on the pin; if the VOS pin is not connected, the OV protection
would be tripped to protect the load.
GND (Pin 5)
This pin represents the signal and power ground for the IC.
This pin is the high current connection, and should be tied to
the ground island/plane through the lowest impedance
connection available. The metal pad under the package
should also be connected to the GND plane for thermal
conductivity, but does not conduct any current.
PHASE (Pin 2)
Connect this pin to the source of the upper MOSFET, and
the drain of the lower MOSFET. It is used as the sink for the
UGATE driver, and to monitor the voltage drop across the
lower MOSFET for overcurrent protection. This pin is also
monitored by the adaptive shoot-through protection circuitry
to determine when the upper MOSFET has turned off.
UGATE (Pin 3)
Connect this pin to the gate of upper MOSFET; it provides
the PWM-controlled gate drive. It is also monitored by the
adaptive shoot-through protection circuitry to determine
when the upper MOSFET has turned off.
BOOT (Pin 1)
This pin provides ground referenced bias voltage to the upper
MOSFET driver. A bootstrap circuit is used to create a voltage
suitable to drive an N-Channel MOSFET (equal to VGD minus
the BOOT diode voltage drop), with respect to PHASE.
COMP/EN (Pin 7)
This is a multiplexed pin. During soft-start and normal converter
operation, this pin represents the output of the error amplifier.
Use COMP/EN, in combination with the FB pin, to compensate
the voltage-control feedback loop of the converter.
5 FN6538.2
December 2, 2008